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| author | Mon P Wang <wangmp@apple.com> | 2009-09-03 19:57:35 +0000 |
|---|---|---|
| committer | Mon P Wang <wangmp@apple.com> | 2009-09-03 19:57:35 +0000 |
| commit | eadd21ea3c02b15093adab36126ee290b5b75241 (patch) | |
| tree | 75c8df64fd5f9da6f92c2dcbc66d9cb049accb78 /llvm/test/CodeGen/X86/vshift-2.ll | |
| parent | 3e82117210499848d09fd482d21d21e4546f2ffb (diff) | |
| download | bcm5719-llvm-eadd21ea3c02b15093adab36126ee290b5b75241.tar.gz bcm5719-llvm-eadd21ea3c02b15093adab36126ee290b5b75241.zip | |
Test cases for vector shifts changes r80935
Changed the old vector shift test to use FileCheck
llvm-svn: 80936
Diffstat (limited to 'llvm/test/CodeGen/X86/vshift-2.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vshift-2.ll | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/vshift-2.ll b/llvm/test/CodeGen/X86/vshift-2.ll index d47a28f8558..0f69e740b92 100644 --- a/llvm/test/CodeGen/X86/vshift-2.ll +++ b/llvm/test/CodeGen/X86/vshift-2.ll @@ -1,13 +1,12 @@ -; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx -o %t -; RUN: grep psrlq %t | count 2 -; RUN: grep psrld %t | count 2 -; RUN: grep psrlw %t | count 2 +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -disable-mmx | FileCheck %s ; test vector shifts converted to proper SSE2 vector shifts when the shift ; amounts are the same. define void @shift1a(<2 x i64> %val, <2 x i64>* %dst) nounwind { entry: +; CHECK: shift1a: +; CHECK: psrlq %lshr = lshr <2 x i64> %val, < i64 32, i64 32 > store <2 x i64> %lshr, <2 x i64>* %dst ret void @@ -15,6 +14,9 @@ entry: define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, i64 %amt) nounwind { entry: +; CHECK: shift1b: +; CHECK: movd +; CHECK-NEXT: psrlq %0 = insertelement <2 x i64> undef, i64 %amt, i32 0 %1 = insertelement <2 x i64> %0, i64 %amt, i32 1 %lshr = lshr <2 x i64> %val, %1 @@ -24,6 +26,8 @@ entry: define void @shift2a(<4 x i32> %val, <4 x i32>* %dst) nounwind { entry: +; CHECK: shift2a: +; CHECK: psrld %lshr = lshr <4 x i32> %val, < i32 17, i32 17, i32 17, i32 17 > store <4 x i32> %lshr, <4 x i32>* %dst ret void @@ -31,6 +35,9 @@ entry: define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind { entry: +; CHECK: shift2b: +; CHECK: movd +; CHECK-NEXT: psrld %0 = insertelement <4 x i32> undef, i32 %amt, i32 0 %1 = insertelement <4 x i32> %0, i32 %amt, i32 1 %2 = insertelement <4 x i32> %1, i32 %amt, i32 2 @@ -43,13 +50,20 @@ entry: define void @shift3a(<8 x i16> %val, <8 x i16>* %dst) nounwind { entry: +; CHECK: shift3a: +; CHECK: psrlw %lshr = lshr <8 x i16> %val, < i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5 > store <8 x i16> %lshr, <8 x i16>* %dst ret void } +; properly zero extend the shift amount define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { entry: +; CHECK: shift3b: +; CHECK: movzwl +; CHECK: movd +; CHECK-NEXT: psrlw %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 |
