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| author | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-02-18 09:43:40 +0000 |
|---|---|---|
| committer | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-02-18 09:43:40 +0000 |
| commit | af9befa6b7720294111137816c2ee4c420bf229c (patch) | |
| tree | c4546bda8470b899bf623b1f6e566f4a03a080e4 /llvm/test/CodeGen/X86/vselect-avx.ll | |
| parent | b7e5909a42cb7405c1ec2cc2728bf199497d849b (diff) | |
| download | bcm5719-llvm-af9befa6b7720294111137816c2ee4c420bf229c.tar.gz bcm5719-llvm-af9befa6b7720294111137816c2ee4c420bf229c.zip | |
Fixes two issue in SimplifyDemandedBits of sext_in_reg:
1) We should not try to simplify if the sext has multiple uses
2) There is no need to simplify is the source value is already sign-extended.
Patch by Gil Rapaport <gil.rapaport@intel.com>
Differential Revision: http://reviews.llvm.org/D6949
llvm-svn: 229659
Diffstat (limited to 'llvm/test/CodeGen/X86/vselect-avx.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vselect-avx.ll | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/llvm/test/CodeGen/X86/vselect-avx.ll b/llvm/test/CodeGen/X86/vselect-avx.ll index 0c0f4bbf992..26b00dbd85f 100644 --- a/llvm/test/CodeGen/X86/vselect-avx.ll +++ b/llvm/test/CodeGen/X86/vselect-avx.ll @@ -59,19 +59,15 @@ bb: ; ; <rdar://problem/18819506> -; Note: For now, hard code ORIG_MASK and SHRUNK_MASK registers, because we -; cannot express that ORIG_MASK must not be equal to ORIG_MASK. Otherwise, -; even a faulty pattern would pass! -; ; CHECK-LABEL: test3: -; Compute the original mask. -; CHECK: vpcmpeqd {{%xmm[0-9]+}}, {{%xmm[0-9]+}}, [[ORIG_MASK:%xmm0]] -; Shrink the bit of the mask. -; CHECK-NEXT: vpslld $31, [[ORIG_MASK]], [[SHRUNK_MASK:%xmm3]] -; Use the shrunk mask in the blend. -; CHECK-NEXT: vblendvps [[SHRUNK_MASK]], %xmm{{[0-9]+}}, %xmm{{[0-9]+}}, %xmm{{[0-9]+}} -; Use the original mask in the and. -; CHECK-NEXT: vpand LCPI2_2(%rip), [[ORIG_MASK]], {{%xmm[0-9]+}} +; Compute the mask. +; CHECK: vpcmpeqd {{%xmm[0-9]+}}, {{%xmm[0-9]+}}, [[MASK:%xmm[0-9]+]] +; Do not shrink the bit of the mask. +; CHECK-NOT: vpslld $31, [[MASK]], {{%xmm[0-9]+}} +; Use the mask in the blend. +; CHECK-NEXT: vblendvps [[MASK]], %xmm{{[0-9]+}}, %xmm{{[0-9]+}}, %xmm{{[0-9]+}} +; Use the mask in the and. +; CHECK-NEXT: vpand LCPI2_2(%rip), [[MASK]], {{%xmm[0-9]+}} ; CHECK: retq define void @test3(<4 x i32> %induction30, <4 x i16>* %tmp16, <4 x i16>* %tmp17, <4 x i16> %tmp3, <4 x i16> %tmp12) { %tmp6 = srem <4 x i32> %induction30, <i32 3, i32 3, i32 3, i32 3> |
