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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-02-19 15:57:09 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-02-19 15:57:09 +0000 |
| commit | 952abcefe42837346eee8ee5e4fd3add7388c04a (patch) | |
| tree | 2cbaed6315cd714f0bfc5325e701e8b0396f5b72 /llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll | |
| parent | baff199877380a0b7269f7949ad7fb8740bab97a (diff) | |
| download | bcm5719-llvm-952abcefe42837346eee8ee5e4fd3add7388c04a.tar.gz bcm5719-llvm-952abcefe42837346eee8ee5e4fd3add7388c04a.zip | |
[X86][AVX] EltsFromConsecutiveLoads - Add BROADCAST lowering support
This patch adds scalar/subvector BROADCAST handling to EltsFromConsecutiveLoads.
It mainly shows codegen changes to 32-bit code which failed to handle i64 loads, although 64-bit code is also using this new path to more efficiently combine to a broadcast load.
Differential Revision: https://reviews.llvm.org/D58053
llvm-svn: 354340
Diffstat (limited to 'llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll | 22 |
1 files changed, 6 insertions, 16 deletions
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll index 4500b63041d..b63a454513f 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll @@ -219,23 +219,13 @@ define <4 x i32> @combine_vpperm_10zz32BA(<4 x i32> %a0, <4 x i32> %a1) { ret <4 x i32> %res3 } -; FIXME: Duplicated load in i686 define void @buildvector_v4f32_0404(float %a, float %b, <4 x float>* %ptr) { -; X86-AVX-LABEL: buildvector_v4f32_0404: -; X86-AVX: # %bb.0: -; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero -; X86-AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3] -; X86-AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0] -; X86-AVX-NEXT: vmovaps %xmm0, (%eax) -; X86-AVX-NEXT: retl -; -; X86-AVX2-LABEL: buildvector_v4f32_0404: -; X86-AVX2: # %bb.0: -; X86-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax -; X86-AVX2-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0] -; X86-AVX2-NEXT: vmovaps %xmm0, (%eax) -; X86-AVX2-NEXT: retl +; X86-LABEL: buildvector_v4f32_0404: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0] +; X86-NEXT: vmovaps %xmm0, (%eax) +; X86-NEXT: retl ; ; X64-AVX-LABEL: buildvector_v4f32_0404: ; X64-AVX: # %bb.0: |
