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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-11-27 18:25:02 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-11-27 18:25:02 +0000 |
| commit | 4571157d2d9e67410540cdc5ad45010b8b17e872 (patch) | |
| tree | 58b0d9940dc39d7ae66db83b3d9f41afbc7014ac /llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll | |
| parent | fec8345108c199b3ddbaf03ad0d3fe472239f859 (diff) | |
| download | bcm5719-llvm-4571157d2d9e67410540cdc5ad45010b8b17e872.tar.gz bcm5719-llvm-4571157d2d9e67410540cdc5ad45010b8b17e872.zip | |
[X86][SSE] Added tests showing missed combines for shuffle to shifts.
llvm-svn: 288000
Diffstat (limited to 'llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll index 16b2efe88a4..97bae0550c8 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-ssse3.ll @@ -296,6 +296,48 @@ define <16 x i8> @combine_pshufb_as_psrldq(<16 x i8> %a0) { ret <16 x i8> %res0 } +define <16 x i8> @combine_pshufb_as_psrlw(<16 x i8> %a0) { +; SSE-LABEL: combine_pshufb_as_psrlw: +; SSE: # BB#0: +; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[1],zero,xmm0[3],zero,xmm0[5],zero,xmm0[7],zero,xmm0[9],zero,xmm0[11],zero,xmm0[13],zero,xmm0[15],zero +; SSE-NEXT: retq +; +; AVX-LABEL: combine_pshufb_as_psrlw: +; AVX: # BB#0: +; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1],zero,xmm0[3],zero,xmm0[5],zero,xmm0[7],zero,xmm0[9],zero,xmm0[11],zero,xmm0[13],zero,xmm0[15],zero +; AVX-NEXT: retq + %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 1, i8 128, i8 3, i8 128, i8 5, i8 128, i8 7, i8 128, i8 9, i8 128, i8 11, i8 128, i8 13, i8 128, i8 15, i8 128>) + ret <16 x i8> %res0 +} + +define <16 x i8> @combine_pshufb_as_pslld(<16 x i8> %a0) { +; SSE-LABEL: combine_pshufb_as_pslld: +; SSE: # BB#0: +; SSE-NEXT: pshufb {{.*#+}} xmm0 = zero,zero,zero,xmm0[0],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[12] +; SSE-NEXT: retq +; +; AVX-LABEL: combine_pshufb_as_pslld: +; AVX: # BB#0: +; AVX-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,xmm0[0],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[12] +; AVX-NEXT: retq + %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 128, i8 128, i8 128, i8 0, i8 128, i8 128, i8 128, i8 4, i8 128, i8 128, i8 128, i8 8, i8 128, i8 128, i8 128, i8 12>) + ret <16 x i8> %res0 +} + +define <16 x i8> @combine_pshufb_as_psrlq(<16 x i8> %a0) { +; SSE-LABEL: combine_pshufb_as_psrlq: +; SSE: # BB#0: +; SSE-NEXT: pshufb {{.*#+}} xmm0 = xmm0[5,6,7],zero,zero,zero,zero,zero,xmm0[13,14,15],zero,zero,zero,zero,zero +; SSE-NEXT: retq +; +; AVX-LABEL: combine_pshufb_as_psrlq: +; AVX: # BB#0: +; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[5,6,7],zero,zero,zero,zero,zero,xmm0[13,14,15],zero,zero,zero,zero,zero +; AVX-NEXT: retq + %res0 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a0, <16 x i8> <i8 5, i8 6, i8 7, i8 128, i8 128, i8 128, i8 128, i8 128, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128>) + ret <16 x i8> %res0 +} + define <16 x i8> @combine_pshufb_as_pshuflw(<16 x i8> %a0) { ; SSE-LABEL: combine_pshufb_as_pshuflw: ; SSE: # BB#0: |
