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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-08-31 16:21:31 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-08-31 16:21:31 +0000 |
| commit | f8d1d0019094acb3979aee60f98d11abe6cc92cf (patch) | |
| tree | 2ad4d0db1909f07b69de2781cca13a893d536cbf /llvm/test/CodeGen/X86/vector-shuffle-avx512.ll | |
| parent | 20be06db97c50f602a5967a58dd73827d5ead0d4 (diff) | |
| download | bcm5719-llvm-f8d1d0019094acb3979aee60f98d11abe6cc92cf.tar.gz bcm5719-llvm-f8d1d0019094acb3979aee60f98d11abe6cc92cf.zip | |
[X86] EltsFromConsecutiveLoads - Don't confuse elt count with vector element count (PR43170)
EltsFromConsecutiveLoads was assuming that the number of input elts was the same as the number of elements in the output vector type when creating a zeroing shuffle, causing an assert when subvectors were being combined instead of just scalars.
llvm-svn: 370592
Diffstat (limited to 'llvm/test/CodeGen/X86/vector-shuffle-avx512.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-shuffle-avx512.ll | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-avx512.ll b/llvm/test/CodeGen/X86/vector-shuffle-avx512.ll index 45f9306326f..c669562dcac 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-avx512.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-avx512.ll @@ -527,3 +527,41 @@ define <16 x float> @test_masked_permps_v16f32(<16 x float>* %vp, <16 x float> % %res = select <16 x i1> <i1 1, i1 1, i1 1, i1 0, i1 1, i1 1, i1 0, i1 0, i1 1, i1 1, i1 1, i1 0, i1 1, i1 0, i1 1, i1 0>, <16 x float> %shuf, <16 x float> %vec2 ret <16 x float> %res } + +%union1= type { <16 x float> } +@src1 = external dso_local local_unnamed_addr global %union1, align 64 + +define void @PR43170(<16 x float>* %a0) { +; SKX64-LABEL: PR43170: +; SKX64: # %bb.0: # %entry +; SKX64-NEXT: vmovaps {{.*}}(%rip), %ymm0 +; SKX64-NEXT: vmovaps %zmm0, (%rdi) +; SKX64-NEXT: vzeroupper +; SKX64-NEXT: retq +; +; KNL64-LABEL: PR43170: +; KNL64: # %bb.0: # %entry +; KNL64-NEXT: vmovaps {{.*}}(%rip), %ymm0 +; KNL64-NEXT: vmovaps %zmm0, (%rdi) +; KNL64-NEXT: retq +; +; SKX32-LABEL: PR43170: +; SKX32: # %bb.0: # %entry +; SKX32-NEXT: movl {{[0-9]+}}(%esp), %eax +; SKX32-NEXT: vmovaps src1, %ymm0 +; SKX32-NEXT: vmovaps %zmm0, (%eax) +; SKX32-NEXT: vzeroupper +; SKX32-NEXT: retl +; +; KNL32-LABEL: PR43170: +; KNL32: # %bb.0: # %entry +; KNL32-NEXT: movl {{[0-9]+}}(%esp), %eax +; KNL32-NEXT: vmovaps src1, %ymm0 +; KNL32-NEXT: vmovaps %zmm0, (%eax) +; KNL32-NEXT: retl +entry: + %0 = load <8 x float>, <8 x float>* bitcast (%union1* @src1 to <8 x float>*), align 64 + %1 = shufflevector <8 x float> %0, <8 x float> zeroinitializer, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> + store <16 x float> %1, <16 x float>* %a0, align 64 + ret void +} |
