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| author | Sanjay Patel <spatel@rotateright.com> | 2015-03-31 18:43:43 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2015-03-31 18:43:43 +0000 |
| commit | 30d589536a47d42222f10ff536081881b3e53914 (patch) | |
| tree | a5892245417f2487bb6f46a7231f7fc36684b2bc /llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | |
| parent | 2b28b5931152d765e05a71cdd6667943a9351f32 (diff) | |
| download | bcm5719-llvm-30d589536a47d42222f10ff536081881b3e53914.tar.gz bcm5719-llvm-30d589536a47d42222f10ff536081881b3e53914.zip | |
[X86, AVX] fix zero-extending integer operand load patterns to use integer instructions
This is a follow-on to r233704 and another partial fix for PR22685:
https://llvm.org/bugs/show_bug.cgi?id=22685
llvm-svn: 233724
Diffstat (limited to 'llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll b/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll index a318e8a17c3..6feffb83609 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll @@ -2090,3 +2090,20 @@ entry: %res = shufflevector <4 x float> %tmp76, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef> ret <8 x float> %res } + +define <8 x i32> @insert_mem_and_zero_v8i32(i32* %ptr) { +; AVX1-LABEL: insert_mem_and_zero_v8i32: +; AVX1: # BB#0: +; AVX1-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero +; AVX1-NEXT: retq +; +; AVX2-LABEL: insert_mem_and_zero_v8i32: +; AVX2: # BB#0: +; AVX2-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero +; AVX2-NEXT: retq + %a = load i32, i32* %ptr + %v = insertelement <8 x i32> undef, i32 %a, i32 0 + %shuffle = shufflevector <8 x i32> %v, <8 x i32> zeroinitializer, <8 x i32> <i32 0, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> + ret <8 x i32> %shuffle +} + |
