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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2015-02-17 22:24:32 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2015-02-17 22:24:32 +0000 |
| commit | 1d89a02abbaa48745066a3c3eabe2fbaa2194def (patch) | |
| tree | 91849735bb8f6c6c44d5b33cc1ab5bb52a088124 /llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | |
| parent | c12cc5eba80e37a088b24b4085df70f1321103fc (diff) | |
| download | bcm5719-llvm-1d89a02abbaa48745066a3c3eabe2fbaa2194def.tar.gz bcm5719-llvm-1d89a02abbaa48745066a3c3eabe2fbaa2194def.zip | |
[X86][SSE] Generalised unpckl/unpckh shuffle matching
Added commuted unpckl/unpckh shuffle matching patterns as many cases containing undefined lanes fail to commute by themselves.
Differential Revision: http://reviews.llvm.org/D7564
llvm-svn: 229571
Diffstat (limited to 'llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll b/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll index 2914ab16eb1..f095a3e45c2 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll @@ -815,13 +815,21 @@ define <8 x float> @shuffle_v8f32_ba983210(<8 x float> %a, <8 x float> %b) { ret <8 x float> %shuffle } -define <8 x float> @shuffle_v8f32_80u1b4uu(<8 x float> %a, <8 x float> %b) { -; ALL-LABEL: shuffle_v8f32_80u1b4uu: +define <8 x float> @shuffle_v8f32_80u1c4u5(<8 x float> %a, <8 x float> %b) { +; ALL-LABEL: shuffle_v8f32_80u1c4u5: ; ALL: # BB#0: -; ALL-NEXT: vshufps {{.*#+}} ymm1 = ymm1[0,0],ymm0[0,0],ymm1[4,4],ymm0[4,4] -; ALL-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,2],ymm0[2,1],ymm1[4,6],ymm0[6,5] +; ALL-NEXT: vunpcklps {{.*#+}} ymm0 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[4],ymm0[4],ymm1[5],ymm0[5] ; ALL-NEXT: retq - %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 8, i32 0, i32 undef, i32 1, i32 12, i32 4, i32 undef, i32 undef> + %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 8, i32 0, i32 undef, i32 1, i32 12, i32 4, i32 undef, i32 5> + ret <8 x float> %shuffle +} + +define <8 x float> @shuffle_v8f32_a2u3e6f7(<8 x float> %a, <8 x float> %b) { +; ALL-LABEL: shuffle_v8f32_a2u3e6f7: +; ALL: # BB#0: +; ALL-NEXT: vunpckhps {{.*#+}} ymm0 = ymm1[2],ymm0[2],ymm1[3],ymm0[3],ymm1[6],ymm0[6],ymm1[7],ymm0[7] +; ALL-NEXT: retq + %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 10, i32 2, i32 undef, i32 3, i32 14, i32 6, i32 15, i32 7> ret <8 x float> %shuffle } @@ -1882,14 +1890,12 @@ define <8 x i32> @shuffle_v8i32_9ubzdefz(<8 x i32> %a) { define <8 x i32> @shuffle_v8i32_80u1b4uu(<8 x i32> %a, <8 x i32> %b) { ; AVX1-LABEL: shuffle_v8i32_80u1b4uu: ; AVX1: # BB#0: -; AVX1-NEXT: vshufps {{.*#+}} ymm1 = ymm1[0,0],ymm0[0,0],ymm1[4,4],ymm0[4,4] -; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm1[0,2],ymm0[2,1],ymm1[4,6],ymm0[6,5] +; AVX1-NEXT: vunpcklps {{.*#+}} ymm0 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[4],ymm0[4],ymm1[5],ymm0[5] ; AVX1-NEXT: retq ; ; AVX2-LABEL: shuffle_v8i32_80u1b4uu: ; AVX2: # BB#0: -; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,0,2,1,4,4,6,5] -; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3],ymm1[4],ymm0[5,6,7] +; AVX2-NEXT: vpunpckldq {{.*#+}} ymm0 = ymm1[0],ymm0[0],ymm1[1],ymm0[1],ymm1[4],ymm0[4],ymm1[5],ymm0[5] ; AVX2-NEXT: retq %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 8, i32 0, i32 undef, i32 1, i32 12, i32 4, i32 undef, i32 undef> ret <8 x i32> %shuffle |

