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| author | Craig Topper <craig.topper@gmail.com> | 2019-11-04 19:58:53 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2019-11-04 22:07:46 -0800 |
| commit | f65493a83e3bdb402fb1dfa92bcc25707e961147 (patch) | |
| tree | c2d35b679515fa7e4a0758a12f9797890bf1aa2d /llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll | |
| parent | abc04ff4012c62c98aa9f0d840114b2f56855dc8 (diff) | |
| download | bcm5719-llvm-f65493a83e3bdb402fb1dfa92bcc25707e961147.tar.gz bcm5719-llvm-f65493a83e3bdb402fb1dfa92bcc25707e961147.zip | |
[X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding.
Summary:
The 2 source operands commutable instructions are encoded in the
VEX.VVVV field and the r/m field of the MODRM byte plus the VEX.B
field.
The VEX.B field is missing from the 2-byte VEX encoding. If the
VEX.VVVV source is 0-7 and the other register is 8-15 we can
swap them to avoid needing the VEX.B field. This works as long as
the VEX.W, VEX.mmmmm, and VEX.X fields are also not needed.
Fixes PR36706.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68550
Diffstat (limited to 'llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll b/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll index 4fc1f6023b8..b69b35e73cc 100644 --- a/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll +++ b/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll @@ -179,15 +179,15 @@ define void @vector_variable_shift_left_loop(i32* nocapture %arr, i8* nocapture ; AVX1-NEXT: vmovq {{.*#+}} xmm4 = mem[0],zero ; AVX1-NEXT: vmovq {{.*#+}} xmm5 = mem[0],zero ; AVX1-NEXT: vmovq {{.*#+}} xmm6 = mem[0],zero -; AVX1-NEXT: vpcmpeqb %xmm11, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqb %xmm3, %xmm11, %xmm3 ; AVX1-NEXT: vpmovsxbd %xmm3, %xmm7 ; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[1,1,2,3] ; AVX1-NEXT: vpmovsxbd %xmm3, %xmm3 -; AVX1-NEXT: vpcmpeqb %xmm11, %xmm4, %xmm4 +; AVX1-NEXT: vpcmpeqb %xmm4, %xmm11, %xmm4 ; AVX1-NEXT: vpmovsxbd %xmm4, %xmm8 ; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[1,1,2,3] ; AVX1-NEXT: vpmovsxbd %xmm4, %xmm4 -; AVX1-NEXT: vpcmpeqb %xmm11, %xmm5, %xmm5 +; AVX1-NEXT: vpcmpeqb %xmm5, %xmm11, %xmm5 ; AVX1-NEXT: vmovdqu (%rdi,%rcx,4), %xmm9 ; AVX1-NEXT: vpslld %xmm2, %xmm9, %xmm10 ; AVX1-NEXT: vpslld %xmm1, %xmm9, %xmm0 @@ -195,7 +195,7 @@ define void @vector_variable_shift_left_loop(i32* nocapture %arr, i8* nocapture ; AVX1-NEXT: vpmovsxbd %xmm5, %xmm7 ; AVX1-NEXT: vpshufd {{.*#+}} xmm5 = xmm5[1,1,2,3] ; AVX1-NEXT: vpmovsxbd %xmm5, %xmm5 -; AVX1-NEXT: vpcmpeqb %xmm11, %xmm6, %xmm6 +; AVX1-NEXT: vpcmpeqb %xmm6, %xmm11, %xmm6 ; AVX1-NEXT: vmovdqu 16(%rdi,%rcx,4), %xmm0 ; AVX1-NEXT: vpslld %xmm2, %xmm0, %xmm2 ; AVX1-NEXT: vpslld %xmm1, %xmm0, %xmm0 |
