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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-03-02 11:43:05 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-03-02 11:43:05 +0000 |
| commit | c02b72627a57f7de893ccf675d01e09a53a24b92 (patch) | |
| tree | 30f867c7591921809f509cfd8072084a4545be55 /llvm/test/CodeGen/X86/vec_extract-sse4.ll | |
| parent | f2fbabe9c1955fc7e67d1e90f73aebcf54c49949 (diff) | |
| download | bcm5719-llvm-c02b72627a57f7de893ccf675d01e09a53a24b92.tar.gz bcm5719-llvm-c02b72627a57f7de893ccf675d01e09a53a24b92.zip | |
[X86][SSE] Lower 128-bit MOVDDUP with existing VBROADCAST mechanisms
We have a number of useful lowering strategies for VBROADCAST instructions (both from memory and register element 0) which the 128-bit form of the MOVDDUP instruction can make use of.
This patch tweaks lowerVectorShuffleAsBroadcast to enable it to broadcast 2f64 args using MOVDDUP as well.
It does require a slight tweak to the lowerVectorShuffleAsBroadcast mechanism as the existing MOVDDUP lowering uses isShuffleEquivalent which can match binary shuffles that can lower to (unary) broadcasts.
Differential Revision: http://reviews.llvm.org/D17680
llvm-svn: 262478
Diffstat (limited to 'llvm/test/CodeGen/X86/vec_extract-sse4.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vec_extract-sse4.ll | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/X86/vec_extract-sse4.ll b/llvm/test/CodeGen/X86/vec_extract-sse4.ll index 9f4210f7847..cea0d64ca7a 100644 --- a/llvm/test/CodeGen/X86/vec_extract-sse4.ll +++ b/llvm/test/CodeGen/X86/vec_extract-sse4.ll @@ -20,8 +20,7 @@ define float @t2(<4 x float>* %P1) nounwind { ; CHECK: # BB#0: ; CHECK-NEXT: pushl %eax ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax -; CHECK-NEXT: movapd (%eax), %xmm0 -; CHECK-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1,0] +; CHECK-NEXT: movddup {{.*#+}} xmm0 = mem[0,0] ; CHECK-NEXT: movss %xmm0, (%esp) ; CHECK-NEXT: flds (%esp) ; CHECK-NEXT: popl %eax |
