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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-12-15 16:05:29 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-12-15 16:05:29 +0000 |
| commit | d7518896fff080d49d4c04e38af691b12be93e14 (patch) | |
| tree | bddc42147251704235c03a415234d2611ca9afe9 /llvm/test/CodeGen/X86/vec_extract-mmx.ll | |
| parent | 879a657680e808a8a0eeb6b45eaaaf635a91048d (diff) | |
| download | bcm5719-llvm-d7518896fff080d49d4c04e38af691b12be93e14.tar.gz bcm5719-llvm-d7518896fff080d49d4c04e38af691b12be93e14.zip | |
[X86][SSE] Fix domains for VZEXT_LOAD type instructions
Add the missing domain equivalences for movss, movsd, movd and movq zero extending loading instructions.
Differential Revision: https://reviews.llvm.org/D27684
llvm-svn: 289825
Diffstat (limited to 'llvm/test/CodeGen/X86/vec_extract-mmx.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vec_extract-mmx.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/vec_extract-mmx.ll b/llvm/test/CodeGen/X86/vec_extract-mmx.ll index 329437cfeda..374ae0c4f8b 100644 --- a/llvm/test/CodeGen/X86/vec_extract-mmx.ll +++ b/llvm/test/CodeGen/X86/vec_extract-mmx.ll @@ -16,7 +16,7 @@ define i32 @test0(<1 x i64>* %v4) nounwind { ; X32-NEXT: movl %ecx, (%esp) ; X32-NEXT: pshufw $238, (%esp), %mm0 # mm0 = mem[2,3,2,3] ; X32-NEXT: movq %mm0, {{[0-9]+}}(%esp) -; X32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero +; X32-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3] ; X32-NEXT: movd %xmm0, %eax ; X32-NEXT: addl $32, %eax @@ -55,7 +55,7 @@ define i32 @test1(i32* nocapture readonly %ptr) nounwind { ; X32-NEXT: movd (%eax), %mm0 ; X32-NEXT: pshufw $232, %mm0, %mm0 # mm0 = mm0[0,2,2,3] ; X32-NEXT: movq %mm0, (%esp) -; X32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero +; X32-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3] ; X32-NEXT: movd %xmm0, %eax ; X32-NEXT: emms @@ -98,7 +98,7 @@ define i32 @test2(i32* nocapture readonly %ptr) nounwind { ; X32-NEXT: movl 8(%ebp), %eax ; X32-NEXT: pshufw $232, (%eax), %mm0 # mm0 = mem[0,2,2,3] ; X32-NEXT: movq %mm0, (%esp) -; X32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero +; X32-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3] ; X32-NEXT: movd %xmm0, %eax ; X32-NEXT: emms @@ -149,7 +149,7 @@ define i32 @test4(x86_mmx %a) nounwind { ; X32-NEXT: andl $-8, %esp ; X32-NEXT: subl $8, %esp ; X32-NEXT: movq %mm0, (%esp) -; X32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero +; X32-NEXT: movq {{.*#+}} xmm0 = mem[0],zero ; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,0,1] ; X32-NEXT: movd %xmm0, %eax ; X32-NEXT: movl %ebp, %esp |
