summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/X86/vec_extract-mmx.ll
diff options
context:
space:
mode:
authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2015-02-26 15:10:38 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2015-02-26 15:10:38 +0000
commit7b6c1ec22db79c777fbb8c3887ea6e2aad46efce (patch)
tree775170a6f562af6f7b0d754379e4915095a6bf7a /llvm/test/CodeGen/X86/vec_extract-mmx.ll
parentfa6cdc8a597686769b899ee113d3f4a135e2fe22 (diff)
downloadbcm5719-llvm-7b6c1ec22db79c777fbb8c3887ea6e2aad46efce.tar.gz
bcm5719-llvm-7b6c1ec22db79c777fbb8c3887ea6e2aad46efce.zip
[X86][MMX] Remove widening experimental flag from MMX tests.
Turns out that after the past MMX commits, we don't need to rely on this flag to get better codegen for MMX. Also update the tests to become triple neutral. llvm-svn: 230637
Diffstat (limited to 'llvm/test/CodeGen/X86/vec_extract-mmx.ll')
-rw-r--r--llvm/test/CodeGen/X86/vec_extract-mmx.ll15
1 files changed, 8 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/X86/vec_extract-mmx.ll b/llvm/test/CodeGen/X86/vec_extract-mmx.ll
index 6b467b83efa..118163cc534 100644
--- a/llvm/test/CodeGen/X86/vec_extract-mmx.ll
+++ b/llvm/test/CodeGen/X86/vec_extract-mmx.ll
@@ -1,12 +1,13 @@
-; RUN: llc < %s -mtriple=x86_64-darwin -x86-experimental-vector-widening-legalization -mattr=+mmx,+sse2 | FileCheck %s
+; RUN: llc < %s -march=x86_64 -mattr=+mmx,+sse2 | FileCheck %s
define i32 @test0(<1 x i64>* %v4) {
; CHECK-LABEL: test0:
-; CHECK: ## BB#0:
-; CHECK-NEXT: pshufw $238, (%rdi), %mm0
+; CHECK: # BB#0:{{.*}} %entry
+; CHECK: pshufw $238, (%[[REG:[a-z]+]]), %mm0
; CHECK-NEXT: movd %mm0, %eax
; CHECK-NEXT: addl $32, %eax
; CHECK-NEXT: retq
+entry:
%v5 = load <1 x i64>* %v4, align 8
%v12 = bitcast <1 x i64> %v5 to <4 x i16>
%v13 = bitcast <4 x i16> %v12 to x86_mmx
@@ -22,8 +23,8 @@ define i32 @test0(<1 x i64>* %v4) {
define i32 @test1(i32* nocapture readonly %ptr) {
; CHECK-LABEL: test1:
-; CHECK: ## BB#0: ## %entry
-; CHECK-NEXT: movd (%rdi), %mm0
+; CHECK: # BB#0:{{.*}} %entry
+; CHECK: movd (%[[REG]]), %mm0
; CHECK-NEXT: pshufw $232, %mm0, %mm0
; CHECK-NEXT: movd %mm0, %eax
; CHECK-NEXT: emms
@@ -48,8 +49,8 @@ entry:
define i32 @test2(i32* nocapture readonly %ptr) {
; CHECK-LABEL: test2:
-; CHECK: ## BB#0: ## %entry
-; CHECK-NEXT: pshufw $232, (%rdi), %mm0
+; CHECK: # BB#0:{{.*}} %entry
+; CHECK: pshufw $232, (%[[REG]]), %mm0
; CHECK-NEXT: movd %mm0, %eax
; CHECK-NEXT: emms
; CHECK-NEXT: retq
OpenPOWER on IntegriCloud