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author | Mitch Phillips <mitchphillips@outlook.com> | 2019-08-06 23:00:43 +0000 |
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committer | Mitch Phillips <mitchphillips@outlook.com> | 2019-08-06 23:00:43 +0000 |
commit | bd0d97e1c41f17ea3fd5cba3fe337b4693eb8cbb (patch) | |
tree | 28cd260c3e06dc187916e21a7ab76b6cb75a1ace /llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll | |
parent | 2f908c1436b51dd8edc5094b97d778aa620db4e3 (diff) | |
download | bcm5719-llvm-bd0d97e1c41f17ea3fd5cba3fe337b4693eb8cbb.tar.gz bcm5719-llvm-bd0d97e1c41f17ea3fd5cba3fe337b4693eb8cbb.zip |
Revert "[X86] Enable -x86-experimental-vector-widening-legalization by default."
This reverts commit 3de33245d2c992c9e0af60372043540b60f3a810.
This commit broke the MSan buildbots. See
https://reviews.llvm.org/rL367901 for more information.
llvm-svn: 368107
Diffstat (limited to 'llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll')
-rw-r--r-- | llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll | 64 |
1 files changed, 48 insertions, 16 deletions
diff --git a/llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll b/llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll index 51b704ec085..8923c393df1 100644 --- a/llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll +++ b/llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll @@ -68,13 +68,17 @@ define <2 x i8> @out_v2i8(<2 x i8> %x, <2 x i8> %y, <2 x i8> %mask) nounwind { ; CHECK-SSE2-LABEL: out_v2i8: ; CHECK-SSE2: # %bb.0: ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0 -; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2 +; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2 +; CHECK-SSE2-NEXT: andps %xmm1, %xmm2 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0 ; CHECK-SSE2-NEXT: retq ; ; CHECK-XOP-LABEL: out_v2i8: ; CHECK-XOP: # %bb.0: -; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1 +; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0 ; CHECK-XOP-NEXT: retq %mx = and <2 x i8> %x, %mask %notmask = xor <2 x i8> %mask, <i8 -1, i8 -1> @@ -170,13 +174,17 @@ define <4 x i8> @out_v4i8(<4 x i8> %x, <4 x i8> %y, <4 x i8> %mask) nounwind { ; CHECK-SSE2-LABEL: out_v4i8: ; CHECK-SSE2: # %bb.0: ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0 -; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2 +; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2 +; CHECK-SSE2-NEXT: andps %xmm1, %xmm2 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0 ; CHECK-SSE2-NEXT: retq ; ; CHECK-XOP-LABEL: out_v4i8: ; CHECK-XOP: # %bb.0: -; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1 +; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0 ; CHECK-XOP-NEXT: retq %mx = and <4 x i8> %x, %mask %notmask = xor <4 x i8> %mask, <i8 -1, i8 -1, i8 -1, i8 -1> @@ -239,13 +247,17 @@ define <4 x i8> @out_v4i8_undef(<4 x i8> %x, <4 x i8> %y, <4 x i8> %mask) nounwi ; CHECK-SSE2-LABEL: out_v4i8_undef: ; CHECK-SSE2: # %bb.0: ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0 -; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2 +; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2 +; CHECK-SSE2-NEXT: andps %xmm1, %xmm2 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0 ; CHECK-SSE2-NEXT: retq ; ; CHECK-XOP-LABEL: out_v4i8_undef: ; CHECK-XOP: # %bb.0: -; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1 +; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0 ; CHECK-XOP-NEXT: retq %mx = and <4 x i8> %x, %mask %notmask = xor <4 x i8> %mask, <i8 -1, i8 -1, i8 undef, i8 -1> @@ -288,13 +300,17 @@ define <2 x i16> @out_v2i16(<2 x i16> %x, <2 x i16> %y, <2 x i16> %mask) nounwin ; CHECK-SSE2-LABEL: out_v2i16: ; CHECK-SSE2: # %bb.0: ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0 -; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2 +; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2 +; CHECK-SSE2-NEXT: andps %xmm1, %xmm2 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0 ; CHECK-SSE2-NEXT: retq ; ; CHECK-XOP-LABEL: out_v2i16: ; CHECK-XOP: # %bb.0: -; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1 +; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0 ; CHECK-XOP-NEXT: retq %mx = and <2 x i16> %x, %mask %notmask = xor <2 x i16> %mask, <i16 -1, i16 -1> @@ -467,13 +483,17 @@ define <8 x i8> @out_v8i8(<8 x i8> %x, <8 x i8> %y, <8 x i8> %mask) nounwind { ; CHECK-SSE2-LABEL: out_v8i8: ; CHECK-SSE2: # %bb.0: ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0 -; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2 +; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2 +; CHECK-SSE2-NEXT: andps %xmm1, %xmm2 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0 ; CHECK-SSE2-NEXT: retq ; ; CHECK-XOP-LABEL: out_v8i8: ; CHECK-XOP: # %bb.0: -; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1 +; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0 ; CHECK-XOP-NEXT: retq %mx = and <8 x i8> %x, %mask %notmask = xor <8 x i8> %mask, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> @@ -548,13 +568,17 @@ define <4 x i16> @out_v4i16(<4 x i16> %x, <4 x i16> %y, <4 x i16> %mask) nounwin ; CHECK-SSE2-LABEL: out_v4i16: ; CHECK-SSE2: # %bb.0: ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0 -; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2 +; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2 +; CHECK-SSE2-NEXT: andps %xmm1, %xmm2 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0 ; CHECK-SSE2-NEXT: retq ; ; CHECK-XOP-LABEL: out_v4i16: ; CHECK-XOP: # %bb.0: -; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1 +; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0 ; CHECK-XOP-NEXT: retq %mx = and <4 x i16> %x, %mask %notmask = xor <4 x i16> %mask, <i16 -1, i16 -1, i16 -1, i16 -1> @@ -617,13 +641,17 @@ define <4 x i16> @out_v4i16_undef(<4 x i16> %x, <4 x i16> %y, <4 x i16> %mask) n ; CHECK-SSE2-LABEL: out_v4i16_undef: ; CHECK-SSE2: # %bb.0: ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0 -; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2 +; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2 +; CHECK-SSE2-NEXT: andps %xmm1, %xmm2 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0 ; CHECK-SSE2-NEXT: retq ; ; CHECK-XOP-LABEL: out_v4i16_undef: ; CHECK-XOP: # %bb.0: -; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1 +; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0 ; CHECK-XOP-NEXT: retq %mx = and <4 x i16> %x, %mask %notmask = xor <4 x i16> %mask, <i16 -1, i16 -1, i16 undef, i16 -1> @@ -664,13 +692,17 @@ define <2 x i32> @out_v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> %mask) nounwin ; CHECK-SSE2-LABEL: out_v2i32: ; CHECK-SSE2: # %bb.0: ; CHECK-SSE2-NEXT: andps %xmm2, %xmm0 -; CHECK-SSE2-NEXT: andnps %xmm1, %xmm2 +; CHECK-SSE2-NEXT: xorps {{.*}}(%rip), %xmm2 +; CHECK-SSE2-NEXT: andps %xmm1, %xmm2 ; CHECK-SSE2-NEXT: orps %xmm2, %xmm0 ; CHECK-SSE2-NEXT: retq ; ; CHECK-XOP-LABEL: out_v2i32: ; CHECK-XOP: # %bb.0: -; CHECK-XOP-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm0, %xmm0 +; CHECK-XOP-NEXT: vxorps {{.*}}(%rip), %xmm2, %xmm2 +; CHECK-XOP-NEXT: vandps %xmm2, %xmm1, %xmm1 +; CHECK-XOP-NEXT: vorps %xmm1, %xmm0, %xmm0 ; CHECK-XOP-NEXT: retq %mx = and <2 x i32> %x, %mask %notmask = xor <2 x i32> %mask, <i32 -1, i32 -1> |