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authorDuncan Sands <baldrick@free.fr>2010-02-19 11:30:41 +0000
committerDuncan Sands <baldrick@free.fr>2010-02-19 11:30:41 +0000
commitd0bf6f640f6a2130cec017761321831db8c49455 (patch)
treee28c76125d02599fb457cb9792c45857f28ff0a5 /llvm/test/CodeGen/X86/trunc-to-bool.ll
parentb81884d347867e9540d37731615ced107aedc6b4 (diff)
downloadbcm5719-llvm-d0bf6f640f6a2130cec017761321831db8c49455.tar.gz
bcm5719-llvm-d0bf6f640f6a2130cec017761321831db8c49455.zip
Revert commits 96556 and 96640, because commit 96556 breaks the
dragonegg self-host build. I reverted 96640 in order to revert 96556 (96640 goes on top of 96556), but it also looks like with both of them applied the breakage happens even earlier. The symptom of the 96556 miscompile is the following crash: llvm[3]: Compiling AlphaISelLowering.cpp for Release build cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed. Stack dump: 0. Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE' g++: Internal error: Aborted (program cc1plus) This occurs when building LLVM using LLVM built by LLVM (via dragonegg). Probably LLVM has miscompiled itself, though it may have miscompiled GCC and/or dragonegg itself: at this point of the self-host build, all of GCC, LLVM and dragonegg were built using LLVM. Unfortunately this kind of thing is extremely hard to debug, and while I did rummage around a bit I didn't find any smoking guns, aka obviously miscompiled code. Found by bisection. r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines Some dag combiner goodness: Transform br (xor (x, y)) -> br (x != y) Transform br (xor (xor (x,y), 1)) -> br (x == y) Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm" r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines Transform (xor (setcc), (setcc)) == / != 1 to (xor (setcc), (setcc)) != / == 1. e.g. On x86_64 %0 = icmp eq i32 %x, 0 %1 = icmp eq i32 %y, 0 %2 = xor i1 %1, %0 br i1 %2, label %bb, label %return => testl %edi, %edi sete %al testl %esi, %esi sete %cl cmpb %al, %cl je LBB1_2 llvm-svn: 96672
Diffstat (limited to 'llvm/test/CodeGen/X86/trunc-to-bool.ll')
-rw-r--r--llvm/test/CodeGen/X86/trunc-to-bool.ll21
1 files changed, 8 insertions, 13 deletions
diff --git a/llvm/test/CodeGen/X86/trunc-to-bool.ll b/llvm/test/CodeGen/X86/trunc-to-bool.ll
index 60620841064..bfab1aef901 100644
--- a/llvm/test/CodeGen/X86/trunc-to-bool.ll
+++ b/llvm/test/CodeGen/X86/trunc-to-bool.ll
@@ -3,14 +3,13 @@
; value and as the operand of a branch.
; RUN: llc < %s -march=x86 | FileCheck %s
-define i1 @test1(i32 %X) zeroext nounwind {
+define i1 @test1(i32 %X) zeroext {
%Y = trunc i32 %X to i1
ret i1 %Y
}
-; CHECK: test1:
; CHECK: andl $1, %eax
-define i1 @test2(i32 %val, i32 %mask) nounwind {
+define i1 @test2(i32 %val, i32 %mask) {
entry:
%shifted = ashr i32 %val, %mask
%anded = and i32 %shifted, 1
@@ -21,10 +20,9 @@ ret_true:
ret_false:
ret i1 false
}
-; CHECK: test2:
-; CHECK: btl %eax
+; CHECK: testb $1, %al
-define i32 @test3(i8* %ptr) nounwind {
+define i32 @test3(i8* %ptr) {
%val = load i8* %ptr
%tmp = trunc i8 %val to i1
br i1 %tmp, label %cond_true, label %cond_false
@@ -33,10 +31,9 @@ cond_true:
cond_false:
ret i32 42
}
-; CHECK: test3:
-; CHECK: testb $1, (%eax)
+; CHECK: testb $1, %al
-define i32 @test4(i8* %ptr) nounwind {
+define i32 @test4(i8* %ptr) {
%tmp = ptrtoint i8* %ptr to i1
br i1 %tmp, label %cond_true, label %cond_false
cond_true:
@@ -44,10 +41,9 @@ cond_true:
cond_false:
ret i32 42
}
-; CHECK: test4:
-; CHECK: testb $1, 4(%esp)
+; CHECK: testb $1, %al
-define i32 @test5(double %d) nounwind {
+define i32 @test6(double %d) {
%tmp = fptosi double %d to i1
br i1 %tmp, label %cond_true, label %cond_false
cond_true:
@@ -55,5 +51,4 @@ cond_true:
cond_false:
ret i32 42
}
-; CHECK: test5:
; CHECK: testb $1
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