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| author | Craig Topper <craig.topper@intel.com> | 2017-09-25 21:14:55 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-09-25 21:14:55 +0000 |
| commit | d830f276c1d877322d3bcd8c7e9e12596fcf1b5a (patch) | |
| tree | 7a9ff88886345b2c383916aef8881521079e4aa7 /llvm/test/CodeGen/X86/tbm_patterns.ll | |
| parent | 8cf757cedaacc1a327917b8ba2465091c0d3d36b (diff) | |
| download | bcm5719-llvm-d830f276c1d877322d3bcd8c7e9e12596fcf1b5a.tar.gz bcm5719-llvm-d830f276c1d877322d3bcd8c7e9e12596fcf1b5a.zip | |
[X86] Make all the NOREX CodeGenOnly instructions into postRA pseudos like the NOREX version of TEST.
llvm-svn: 314151
Diffstat (limited to 'llvm/test/CodeGen/X86/tbm_patterns.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/tbm_patterns.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/X86/tbm_patterns.ll b/llvm/test/CodeGen/X86/tbm_patterns.ll index a72b5405615..47b642bacff 100644 --- a/llvm/test/CodeGen/X86/tbm_patterns.ll +++ b/llvm/test/CodeGen/X86/tbm_patterns.ll @@ -18,7 +18,7 @@ define i32 @test_x86_tbm_bextri_u32_subreg(i32 %a) nounwind { ; CHECK-LABEL: test_x86_tbm_bextri_u32_subreg: ; CHECK: # BB#0: ; CHECK-NEXT: movl %edi, %eax -; CHECK-NEXT: movzbl %ah, %eax # NOREX +; CHECK-NEXT: movzbl %ah, %eax ; CHECK-NEXT: retq %t0 = lshr i32 %a, 8 %t1 = and i32 %t0, 255 @@ -79,7 +79,7 @@ define i64 @test_x86_tbm_bextri_u64_subreg(i64 %a) nounwind { ; CHECK-LABEL: test_x86_tbm_bextri_u64_subreg: ; CHECK: # BB#0: ; CHECK-NEXT: movq %rdi, %rax -; CHECK-NEXT: movzbl %ah, %eax # NOREX +; CHECK-NEXT: movzbl %ah, %eax ; CHECK-NEXT: retq %t0 = lshr i64 %a, 8 %t1 = and i64 %t0, 255 |
