Fix a batch of x86 tests to be coalescer independent.

Most of these tests require a single mov instruction that can come either before
or after a 2-addr instruction. -join-physregs changes the behavior, but the
results are equivalent.

llvm-svn: 130891

1 files changed, 3 insertions, 3 deletions

diff --git a/llvm/test/CodeGen/X86/sse42.ll b/llvm/test/CodeGen/X86/sse42.ll
index 1723909a4b4..f415439cd47 100644
--- a/llvm/test/CodeGen/X86/sse42.ll
+++ b/llvm/test/CodeGen/X86/sse42.ll
@@ -12,7 +12,7 @@ define i32 @crc32_8(i32 %a, i8 %b) nounwind {
 ; X32:     crc32b   8(%esp), %eax
 
 ; X64: _crc32_8:
-; X64:     crc32b   %sil, %eax
+; X64:     crc32b   %sil,
 }
 
 
@@ -23,7 +23,7 @@ define i32 @crc32_16(i32 %a, i16 %b) nounwind {
 ; X32:     crc32w   8(%esp), %eax
 
 ; X64: _crc32_16:
-; X64:     crc32w   %si, %eax
+; X64:     crc32w   %si,
 }
 
 
@@ -34,5 +34,5 @@ define i32 @crc32_32(i32 %a, i32 %b) nounwind {
 ; X32:     crc32l   8(%esp), %eax
 
 ; X64: _crc32_32:
-; X64:     crc32l   %esi, %eax
+; X64:     crc32l   %esi,
 }