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authorEli Friedman <eli.friedman@gmail.com>2011-06-09 22:14:44 +0000
committerEli Friedman <eli.friedman@gmail.com>2011-06-09 22:14:44 +0000
commit1877ac993757e7e7290b9b1e9f3a0f11dd2f5c28 (patch)
tree5f3085cf8439836d79af57cafccd35d956aa1ee7 /llvm/test/CodeGen/X86/shift-pair.ll
parent4b6fed4babceb8021d971f7b943e346defe65879 (diff)
downloadbcm5719-llvm-1877ac993757e7e7290b9b1e9f3a0f11dd2f5c28.tar.gz
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Change this DAGCombine to build AND of SHR instead of SHR of AND; this matches the ordering we prefer in instcombine. Part of rdar://9562809.
The potential DAGCombine which enforces this more generally messes up some other very fragile patterns, so I'm leaving that alone, at least for now. llvm-svn: 132809
Diffstat (limited to 'llvm/test/CodeGen/X86/shift-pair.ll')
-rw-r--r--llvm/test/CodeGen/X86/shift-pair.ll11
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/shift-pair.ll b/llvm/test/CodeGen/X86/shift-pair.ll
new file mode 100644
index 00000000000..24ba1fc7707
--- /dev/null
+++ b/llvm/test/CodeGen/X86/shift-pair.ll
@@ -0,0 +1,11 @@
+; RUN: llc < %s -march=x86-64 | FileCheck %s
+
+define i64 @test(i64 %A) {
+; CHECK: @test
+; CHECK: shrq $54
+; CHECK: andq $1020
+; CHECK: ret
+ %B = lshr i64 %A, 56
+ %C = shl i64 %B, 2
+ ret i64 %C
+}
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