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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-07-31 17:51:37 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-07-31 17:51:37 +0000 |
| commit | 64845bb8b4da276ae8ea5ea5fd305ab0dddbd91a (patch) | |
| tree | e68d5b25cec9201136b6a61df93cc408e8289cef /llvm/test/CodeGen/X86/shift-double.ll | |
| parent | 00d34ed64fcee6c6253237f5bca0f306dcc9f49b (diff) | |
| download | bcm5719-llvm-64845bb8b4da276ae8ea5ea5fd305ab0dddbd91a.tar.gz bcm5719-llvm-64845bb8b4da276ae8ea5ea5fd305ab0dddbd91a.zip | |
[X86] Add tests for the lowering SHLD/SHRD from manual pattern similar to those generated by ExpandShiftWithKnownAmountBit
Test for add(v,v) as well as shl(v,1)
llvm-svn: 277293
Diffstat (limited to 'llvm/test/CodeGen/X86/shift-double.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/shift-double.ll | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/shift-double.ll b/llvm/test/CodeGen/X86/shift-double.ll index 3aca9ac59db..0cb6a575255 100644 --- a/llvm/test/CodeGen/X86/shift-double.ll +++ b/llvm/test/CodeGen/X86/shift-double.ll @@ -287,3 +287,78 @@ define i32 @test14(i32 %hi, i32 %lo, i32 %bits) nounwind { %sh = or i32 %sh_lo, %sh_hi ret i32 %sh } + +define i32 @test15(i32 %hi, i32 %lo, i32 %bits) nounwind { +; CHECK-LABEL: test15: +; CHECK: # BB#0: +; CHECK-NEXT: pushl %esi +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx +; CHECK-NEXT: movl %edx, %ecx +; CHECK-NEXT: xorl $31, %ecx +; CHECK-NEXT: shrl %esi +; CHECK-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill> +; CHECK-NEXT: shrl %cl, %esi +; CHECK-NEXT: movl %edx, %ecx +; CHECK-NEXT: shll %cl, %eax +; CHECK-NEXT: orl %esi, %eax +; CHECK-NEXT: popl %esi +; CHECK-NEXT: retl + %bits32 = xor i32 %bits, 31 + %lo2 = lshr i32 %lo, 1 + %sh_lo = lshr i32 %lo2, %bits32 + %sh_hi = shl i32 %hi, %bits + %sh = or i32 %sh_lo, %sh_hi + ret i32 %sh +} + +define i32 @test16(i32 %hi, i32 %lo, i32 %bits) nounwind { +; CHECK-LABEL: test16: +; CHECK: # BB#0: +; CHECK-NEXT: pushl %esi +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx +; CHECK-NEXT: movl %edx, %ecx +; CHECK-NEXT: xorl $31, %ecx +; CHECK-NEXT: addl %esi, %esi +; CHECK-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill> +; CHECK-NEXT: shll %cl, %esi +; CHECK-NEXT: movl %edx, %ecx +; CHECK-NEXT: shrl %cl, %eax +; CHECK-NEXT: orl %esi, %eax +; CHECK-NEXT: popl %esi +; CHECK-NEXT: retl + %bits32 = xor i32 %bits, 31 + %lo2 = shl i32 %lo, 1 + %sh_lo = shl i32 %lo2, %bits32 + %sh_hi = lshr i32 %hi, %bits + %sh = or i32 %sh_lo, %sh_hi + ret i32 %sh +} + +define i32 @test17(i32 %hi, i32 %lo, i32 %bits) nounwind { +; CHECK-LABEL: test17: +; CHECK: # BB#0: +; CHECK-NEXT: pushl %esi +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx +; CHECK-NEXT: movl %edx, %ecx +; CHECK-NEXT: xorl $31, %ecx +; CHECK-NEXT: addl %esi, %esi +; CHECK-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill> +; CHECK-NEXT: shll %cl, %esi +; CHECK-NEXT: movl %edx, %ecx +; CHECK-NEXT: shrl %cl, %eax +; CHECK-NEXT: orl %esi, %eax +; CHECK-NEXT: popl %esi +; CHECK-NEXT: retl + %bits32 = xor i32 %bits, 31 + %lo2 = add i32 %lo, %lo + %sh_lo = shl i32 %lo2, %bits32 + %sh_hi = lshr i32 %hi, %bits + %sh = or i32 %sh_lo, %sh_hi + ret i32 %sh +} |
