diff options
| author | Sanjay Patel <spatel@rotateright.com> | 2017-09-18 22:05:35 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2017-09-18 22:05:35 +0000 |
| commit | f31b1a00ea4d2916dfcc0fd476bebdb0fc60ff9f (patch) | |
| tree | 58b2fbe068da8af4c73d501d153c817d79ce91b0 /llvm/test/CodeGen/X86/select_const.ll | |
| parent | 1468677cbe9a39a8032a2e3e5363ffe74be96b40 (diff) | |
| download | bcm5719-llvm-f31b1a00ea4d2916dfcc0fd476bebdb0fc60ff9f.tar.gz bcm5719-llvm-f31b1a00ea4d2916dfcc0fd476bebdb0fc60ff9f.zip | |
[DAGCombiner] fold assertzexts separated by trunc
If we have an AssertZext of a truncated value that has already been AssertZext'ed,
we can assert on the wider source op to improve the zext-y knowledge:
assert (trunc (assert X, i8) to iN), i1 --> trunc (assert X, i1) to iN
This moves a fold from being Mips-specific to general combining, and x86 shows
improvements.
Differential Revision: https://reviews.llvm.org/D37017
llvm-svn: 313577
Diffstat (limited to 'llvm/test/CodeGen/X86/select_const.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/select_const.ll | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/X86/select_const.ll b/llvm/test/CodeGen/X86/select_const.ll index 7d13cc7b788..07aa909d9a9 100644 --- a/llvm/test/CodeGen/X86/select_const.ll +++ b/llvm/test/CodeGen/X86/select_const.ll @@ -53,7 +53,7 @@ define i32 @select_1_or_0(i1 %cond) { define i32 @select_1_or_0_zeroext(i1 zeroext %cond) { ; CHECK-LABEL: select_1_or_0_zeroext: ; CHECK: # BB#0: -; CHECK-NEXT: movzbl %dil, %eax +; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 1, i32 0 ret i32 %sel @@ -85,8 +85,8 @@ define i32 @select_0_or_neg1(i1 %cond) { define i32 @select_0_or_neg1_zeroext(i1 zeroext %cond) { ; CHECK-LABEL: select_0_or_neg1_zeroext: ; CHECK: # BB#0: -; CHECK-NEXT: movzbl %dil, %eax -; CHECK-NEXT: decl %eax +; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> +; CHECK-NEXT: leal -1(%rdi), %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 0, i32 -1 ret i32 %sel @@ -119,8 +119,8 @@ define i32 @select_neg1_or_0(i1 %cond) { define i32 @select_neg1_or_0_zeroext(i1 zeroext %cond) { ; CHECK-LABEL: select_neg1_or_0_zeroext: ; CHECK: # BB#0: -; CHECK-NEXT: movzbl %dil, %eax -; CHECK-NEXT: negl %eax +; CHECK-NEXT: negl %edi +; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 -1, i32 0 ret i32 %sel @@ -151,8 +151,8 @@ define i32 @select_Cplus1_C(i1 %cond) { define i32 @select_Cplus1_C_zeroext(i1 zeroext %cond) { ; CHECK-LABEL: select_Cplus1_C_zeroext: ; CHECK: # BB#0: -; CHECK-NEXT: movzbl %dil, %eax -; CHECK-NEXT: addl $41, %eax +; CHECK-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def> +; CHECK-NEXT: leal 41(%rdi), %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 42, i32 41 ret i32 %sel @@ -185,9 +185,8 @@ define i32 @select_C_Cplus1(i1 %cond) { define i32 @select_C_Cplus1_zeroext(i1 zeroext %cond) { ; CHECK-LABEL: select_C_Cplus1_zeroext: ; CHECK: # BB#0: -; CHECK-NEXT: movzbl %dil, %ecx ; CHECK-NEXT: movl $42, %eax -; CHECK-NEXT: subl %ecx, %eax +; CHECK-NEXT: subl %edi, %eax ; CHECK-NEXT: retq %sel = select i1 %cond, i32 41, i32 42 ret i32 %sel @@ -413,7 +412,7 @@ define i32 @select_C1_C2(i1 %cond) { define i32 @select_C1_C2_zeroext(i1 zeroext %cond) { ; CHECK-LABEL: select_C1_C2_zeroext: ; CHECK: # BB#0: -; CHECK-NEXT: testb %dil, %dil +; CHECK-NEXT: testl %edi, %edi ; CHECK-NEXT: movl $421, %ecx # imm = 0x1A5 ; CHECK-NEXT: movl $42, %eax ; CHECK-NEXT: cmovnel %ecx, %eax |
