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| author | Craig Topper <craig.topper@intel.com> | 2018-12-12 19:20:21 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-12-12 19:20:21 +0000 |
| commit | 4937adf75f024f5cbd3cc190d5bd57d1761aefc3 (patch) | |
| tree | d7a7794e50161f74cfd6aa0c008d32296392121b /llvm/test/CodeGen/X86/scheduler-backtracking.ll | |
| parent | 2ef6c46b2f9a2f9dce73d7b15bf837a2feb0bd8a (diff) | |
| download | bcm5719-llvm-4937adf75f024f5cbd3cc190d5bd57d1761aefc3.tar.gz bcm5719-llvm-4937adf75f024f5cbd3cc190d5bd57d1761aefc3.zip | |
[X86] Emit SBB instead of SETCC_CARRY from LowerSELECT. Break false dependency on the SBB input.
I'm hoping we can just replace SETCC_CARRY with SBB. This is another step towards that.
I've explicitly used zero as the input to the setcc to avoid a false dependency that we've had with the SETCC_CARRY. I changed one of the patterns that used NEG to instead use an explicit compare with 0 on the LHS. We needed the zero anyway to avoid the false dependency. The negate would clobber its input register. By using a CMP we can avoid that which could be useful.
Differential Revision: https://reviews.llvm.org/D55414
llvm-svn: 348959
Diffstat (limited to 'llvm/test/CodeGen/X86/scheduler-backtracking.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/scheduler-backtracking.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/X86/scheduler-backtracking.ll b/llvm/test/CodeGen/X86/scheduler-backtracking.ll index 5af630f2091..cb8571bf61a 100644 --- a/llvm/test/CodeGen/X86/scheduler-backtracking.ll +++ b/llvm/test/CodeGen/X86/scheduler-backtracking.ll @@ -697,8 +697,8 @@ define i64 @test4(i64 %a, i64 %b) nounwind { ; ILP-NEXT: cmpq %rdi, %rsi ; ILP-NEXT: sbbq $0, %rdx ; ILP-NEXT: movl $0, %edx -; ILP-NEXT: sbbq $0, %rdx -; ILP-NEXT: sbbq $0, %rcx +; ILP-NEXT: sbbq %rdx, %rdx +; ILP-NEXT: sbbq %rcx, %rcx ; ILP-NEXT: setae %cl ; ILP-NEXT: movzbl %cl, %ecx ; ILP-NEXT: subq %rcx, %rax @@ -713,8 +713,8 @@ define i64 @test4(i64 %a, i64 %b) nounwind { ; HYBRID-NEXT: cmpq %rdi, %rsi ; HYBRID-NEXT: sbbq $0, %rcx ; HYBRID-NEXT: movl $0, %ecx -; HYBRID-NEXT: sbbq $0, %rcx -; HYBRID-NEXT: sbbq $0, %rax +; HYBRID-NEXT: sbbq %rcx, %rcx +; HYBRID-NEXT: sbbq %rax, %rax ; HYBRID-NEXT: setae %al ; HYBRID-NEXT: movzbl %al, %ecx ; HYBRID-NEXT: movl $2, %eax @@ -730,8 +730,8 @@ define i64 @test4(i64 %a, i64 %b) nounwind { ; BURR-NEXT: cmpq %rdi, %rsi ; BURR-NEXT: sbbq $0, %rcx ; BURR-NEXT: movl $0, %ecx -; BURR-NEXT: sbbq $0, %rcx -; BURR-NEXT: sbbq $0, %rax +; BURR-NEXT: sbbq %rcx, %rcx +; BURR-NEXT: sbbq %rax, %rax ; BURR-NEXT: setae %al ; BURR-NEXT: movzbl %al, %ecx ; BURR-NEXT: movl $2, %eax @@ -747,8 +747,8 @@ define i64 @test4(i64 %a, i64 %b) nounwind { ; SRC-NEXT: cmpq %rdi, %rsi ; SRC-NEXT: sbbq $0, %rax ; SRC-NEXT: movl $0, %eax -; SRC-NEXT: sbbq $0, %rax -; SRC-NEXT: sbbq $0, %rcx +; SRC-NEXT: sbbq %rax, %rax +; SRC-NEXT: sbbq %rcx, %rcx ; SRC-NEXT: setae %al ; SRC-NEXT: movzbl %al, %ecx ; SRC-NEXT: movl $2, %eax @@ -765,8 +765,8 @@ define i64 @test4(i64 %a, i64 %b) nounwind { ; LIN-NEXT: cmpq %rdi, %rsi ; LIN-NEXT: sbbq $0, %rdx ; LIN-NEXT: movl $0, %edx -; LIN-NEXT: sbbq $0, %rdx -; LIN-NEXT: sbbq $0, %rcx +; LIN-NEXT: sbbq %rdx, %rdx +; LIN-NEXT: sbbq %rcx, %rcx ; LIN-NEXT: setae %cl ; LIN-NEXT: movzbl %cl, %ecx ; LIN-NEXT: subq %rcx, %rax |
