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| author | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2016-01-10 09:41:22 +0000 |
|---|---|---|
| committer | Elena Demikhovsky <elena.demikhovsky@intel.com> | 2016-01-10 09:41:22 +0000 |
| commit | 542dfcf44c2204d3ac9de1d8b601e2ddfa1bd1c5 (patch) | |
| tree | 40dfc4fb41ee6a383b29de49b265bb2c657d0c14 /llvm/test/CodeGen/X86/scalar-int-to-fp.ll | |
| parent | 6145f7dadc5cfc179e01bd25d907eddc3417fe31 (diff) | |
| download | bcm5719-llvm-542dfcf44c2204d3ac9de1d8b601e2ddfa1bd1c5.tar.gz bcm5719-llvm-542dfcf44c2204d3ac9de1d8b601e2ddfa1bd1c5.zip | |
Optimized instruction sequence for sitofp operation on X86-32
Optimized sitofp i64 %x to double. The current sequence
movl %ecx, 8(%esp)
movl %edx, 12(%esp)
fildll 8(%esp)
is replaced with:
movd %ecx, %xmm0
movd %edx, %xmm1
punpckldq %xmm1, %xmm0
movq %xmm0, 8(%esp)
Differential Revision: http://reviews.llvm.org/D15946
llvm-svn: 257285
Diffstat (limited to 'llvm/test/CodeGen/X86/scalar-int-to-fp.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/scalar-int-to-fp.ll | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/scalar-int-to-fp.ll b/llvm/test/CodeGen/X86/scalar-int-to-fp.ll index 93039859cdf..4a16c3198aa 100644 --- a/llvm/test/CodeGen/X86/scalar-int-to-fp.ll +++ b/llvm/test/CodeGen/X86/scalar-int-to-fp.ll @@ -74,9 +74,16 @@ define x86_fp80 @s32_to_x(i32 %a) nounwind { } ; CHECK-LABEL: u64_to_f +; AVX512_32: vmovq {{.*#+}} xmm0 = mem[0],zero +; AVX512_32: vmovlpd %xmm0, {{[0-9]+}}(%esp) ; AVX512_32: fildll + ; AVX512_64: vcvtusi2ssq + +; SSE2_32: movq {{.*#+}} xmm0 = mem[0],zero +; SSE2_32: movq %xmm0, {{[0-9]+}}(%esp) ; SSE2_32: fildll + ; SSE2_64: cvtsi2ssq ; X87: fildll define float @u64_to_f(i64 %a) nounwind { @@ -95,6 +102,24 @@ define float @s64_to_f(i64 %a) nounwind { ret float %r } +; CHECK-LABEL: s64_to_f_2 +; SSE2_32: movd %ecx, %xmm0 +; SSE2_32: movd %eax, %xmm1 +; SSE2_32: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] +; SSE2_32: movq %xmm1, {{[0-9]+}}(%esp) +; SSE2_32: fildll {{[0-9]+}}(%esp) + +; AVX512_32: vmovd %eax, %xmm0 +; AVX512_32: vpinsrd $1, %ecx, %xmm0, %xmm0 +; AVX512_32: vmovlpd %xmm0, {{[0-9]+}}(%esp) +; AVX512_32: fildll {{[0-9]+}}(%esp) + +define float @s64_to_f_2(i64 %a) nounwind { + %a1 = add i64 %a, 5 + %r = sitofp i64 %a1 to float + ret float %r +} + ; CHECK-LABEL: u64_to_d ; AVX512_32: vpunpckldq ; AVX512_64: vcvtusi2sdq @@ -117,6 +142,24 @@ define double @s64_to_d(i64 %a) nounwind { ret double %r } +; CHECK-LABEL: s64_to_d_2 +; SSE2_32: movd %ecx, %xmm0 +; SSE2_32: movd %eax, %xmm1 +; SSE2_32: punpckldq %xmm0, %xmm1 +; SSE2_32: movq %xmm1, {{[0-9]+}}(%esp) +; SSE2_32: fildll + +; AVX512_32: vmovd %eax, %xmm0 +; AVX512_32: vpinsrd $1, %ecx, %xmm0, %xmm0 +; AVX512_32: vmovlpd %xmm0, {{[0-9]+}}(%esp) +; AVX512_32: fildll + +define double @s64_to_d_2(i64 %a) nounwind { + %b = add i64 %a, 5 + %f = sitofp i64 %b to double + ret double %f +} + ; CHECK-LABEL: u64_to_x ; CHECK: fildll define x86_fp80 @u64_to_x(i64 %a) nounwind { |
