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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-06-09 20:13:58 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-06-09 20:13:58 +0000 |
| commit | 0ab9d3026ae951020510573e0d6cf41cacd0fabc (patch) | |
| tree | c96dc5389af9991d32a44134bdb48077ea3bf7a2 /llvm/test/CodeGen/X86/sad.ll | |
| parent | 4fb571175168d9b88dd3c31df1713a0e42fc1972 (diff) | |
| download | bcm5719-llvm-0ab9d3026ae951020510573e0d6cf41cacd0fabc.tar.gz bcm5719-llvm-0ab9d3026ae951020510573e0d6cf41cacd0fabc.zip | |
[X86][AVX512] Added support for lowering 512-bit vector shuffles to bit/byte shifts
512-bit VPSLLDQ/VPSRLDQ can only be used for avx512bw targets so lowerVectorShuffleAsShift had to be adjusted to include the subtarget
llvm-svn: 272300
Diffstat (limited to 'llvm/test/CodeGen/X86/sad.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/sad.ll | 24 |
1 files changed, 9 insertions, 15 deletions
diff --git a/llvm/test/CodeGen/X86/sad.ll b/llvm/test/CodeGen/X86/sad.ll index 4e764a7d8e7..8619badf666 100644 --- a/llvm/test/CodeGen/X86/sad.ll +++ b/llvm/test/CodeGen/X86/sad.ll @@ -78,9 +78,7 @@ define i32 @sad_16i8() nounwind { ; AVX512F-NEXT: vpaddd %zmm1, %zmm0, %zmm0 ; AVX512F-NEXT: vpunpckhqdq {{.*#+}} zmm1 = zmm0[1,1,3,3,5,5,7,7] ; AVX512F-NEXT: vpaddd %zmm1, %zmm0, %zmm0 -; AVX512F-NEXT: movl $1, %eax -; AVX512F-NEXT: vmovd %eax, %xmm1 -; AVX512F-NEXT: vpermd %zmm0, %zmm1, %zmm1 +; AVX512F-NEXT: vpsrlq $32, %zmm0, %zmm1 ; AVX512F-NEXT: vpaddd %zmm1, %zmm0, %zmm0 ; AVX512F-NEXT: vmovd %xmm0, %eax ; AVX512F-NEXT: retq @@ -103,9 +101,9 @@ define i32 @sad_16i8() nounwind { ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0 ; AVX512BW-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[2,3,0,1,0,1,0,1] ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpunpckhqdq {{.*#+}} zmm1 = zmm0[1,1,3,3,5,5,7,7] +; AVX512BW-NEXT: vpsrldq $8, %zmm0, %zmm1 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpalignr {{.*#+}} zmm1 = zmm0[4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,20,21,22,23,24,25,26,27,28,29,30,31,16,17,18,19,36,37,38,39,40,41,42,43,44,45,46,47,32,33,34,35,52,53,54,55,56,57,58,59,60,61,62,63,48,49,50,51] +; AVX512BW-NEXT: vpsrlq $32, %zmm0, %zmm1 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0 ; AVX512BW-NEXT: vmovd %xmm0, %eax ; AVX512BW-NEXT: retq @@ -327,9 +325,7 @@ define i32 @sad_32i8() nounwind { ; AVX512F-NEXT: vpaddd %zmm1, %zmm0, %zmm0 ; AVX512F-NEXT: vpunpckhqdq {{.*#+}} zmm1 = zmm0[1,1,3,3,5,5,7,7] ; AVX512F-NEXT: vpaddd %zmm1, %zmm0, %zmm0 -; AVX512F-NEXT: movl $1, %eax -; AVX512F-NEXT: vmovd %eax, %xmm1 -; AVX512F-NEXT: vpermd %zmm0, %zmm1, %zmm1 +; AVX512F-NEXT: vpsrlq $32, %zmm0, %zmm1 ; AVX512F-NEXT: vpaddd %zmm1, %zmm0, %zmm0 ; AVX512F-NEXT: vmovd %xmm0, %eax ; AVX512F-NEXT: retq @@ -354,9 +350,9 @@ define i32 @sad_32i8() nounwind { ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0 ; AVX512BW-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[2,3,0,1,0,1,0,1] ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpunpckhqdq {{.*#+}} zmm1 = zmm0[1,1,3,3,5,5,7,7] +; AVX512BW-NEXT: vpsrldq $8, %zmm0, %zmm1 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpalignr {{.*#+}} zmm1 = zmm0[4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,20,21,22,23,24,25,26,27,28,29,30,31,16,17,18,19,36,37,38,39,40,41,42,43,44,45,46,47,32,33,34,35,52,53,54,55,56,57,58,59,60,61,62,63,48,49,50,51] +; AVX512BW-NEXT: vpsrlq $32, %zmm0, %zmm1 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0 ; AVX512BW-NEXT: vmovd %xmm0, %eax ; AVX512BW-NEXT: retq @@ -811,9 +807,7 @@ define i32 @sad_avx64i8() nounwind { ; AVX512F-NEXT: vpaddd %zmm1, %zmm0, %zmm0 ; AVX512F-NEXT: vpunpckhqdq {{.*#+}} zmm1 = zmm0[1,1,3,3,5,5,7,7] ; AVX512F-NEXT: vpaddd %zmm1, %zmm0, %zmm0 -; AVX512F-NEXT: movl $1, %eax -; AVX512F-NEXT: vmovd %eax, %xmm1 -; AVX512F-NEXT: vpermd %zmm0, %zmm1, %zmm1 +; AVX512F-NEXT: vpsrlq $32, %zmm0, %zmm1 ; AVX512F-NEXT: vpaddd %zmm1, %zmm0, %zmm0 ; AVX512F-NEXT: vmovd %xmm0, %eax ; AVX512F-NEXT: retq @@ -839,9 +833,9 @@ define i32 @sad_avx64i8() nounwind { ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0 ; AVX512BW-NEXT: vshufi64x2 {{.*#+}} zmm1 = zmm0[2,3,0,1,0,1,0,1] ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpunpckhqdq {{.*#+}} zmm1 = zmm0[1,1,3,3,5,5,7,7] +; AVX512BW-NEXT: vpsrldq $8, %zmm0, %zmm1 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpalignr {{.*#+}} zmm1 = zmm0[4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,20,21,22,23,24,25,26,27,28,29,30,31,16,17,18,19,36,37,38,39,40,41,42,43,44,45,46,47,32,33,34,35,52,53,54,55,56,57,58,59,60,61,62,63,48,49,50,51] +; AVX512BW-NEXT: vpsrlq $32, %zmm0, %zmm1 ; AVX512BW-NEXT: vpaddd %zmm1, %zmm0, %zmm0 ; AVX512BW-NEXT: vmovd %xmm0, %eax ; AVX512BW-NEXT: retq |
