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authorSimon Pilgrim <llvm-dev@redking.me.uk>2017-09-05 12:28:30 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2017-09-05 12:28:30 +0000
commit8dbd745b09c9f65fefc2ffac14e8f7f288766861 (patch)
tree2a2cb9ab521438f9e1188119d5749ce4f59e8212 /llvm/test/CodeGen/X86/rot64.ll
parent08246d185b5f0d18b5a2c7b752d15d2641c3cbe2 (diff)
downloadbcm5719-llvm-8dbd745b09c9f65fefc2ffac14e8f7f288766861.tar.gz
bcm5719-llvm-8dbd745b09c9f65fefc2ffac14e8f7f288766861.zip
[X86] Regenerate scalar rotation tests
llvm-svn: 312530
Diffstat (limited to 'llvm/test/CodeGen/X86/rot64.ll')
-rw-r--r--llvm/test/CodeGen/X86/rot64.ll133
1 files changed, 98 insertions, 35 deletions
diff --git a/llvm/test/CodeGen/X86/rot64.ll b/llvm/test/CodeGen/X86/rot64.ll
index 382d242c4f0..b2e7d481d8c 100644
--- a/llvm/test/CodeGen/X86/rot64.ll
+++ b/llvm/test/CodeGen/X86/rot64.ll
@@ -1,11 +1,16 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=SHLD
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=core-avx2 | FileCheck %s --check-prefix=BMI2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s --check-prefix=ALL --check-prefix=X64
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=ALL --check-prefix=SHLD
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=core-avx2 | FileCheck %s --check-prefix=ALL --check-prefix=BMI2
define i64 @foo(i64 %x, i64 %y, i64 %z) nounwind readnone {
+; ALL-LABEL: foo:
+; ALL: # BB#0: # %entry
+; ALL-NEXT: movl %edx, %ecx
+; ALL-NEXT: rolq %cl, %rdi
+; ALL-NEXT: movq %rdi, %rax
+; ALL-NEXT: retq
entry:
-; CHECK-LABEL: foo:
-; CHECK: rolq %cl
%0 = shl i64 %x, %z
%1 = sub i64 64, %z
%2 = lshr i64 %x, %1
@@ -14,9 +19,13 @@ entry:
}
define i64 @bar(i64 %x, i64 %y, i64 %z) nounwind readnone {
+; ALL-LABEL: bar:
+; ALL: # BB#0: # %entry
+; ALL-NEXT: movl %edx, %ecx
+; ALL-NEXT: shldq %cl, %rdi, %rsi
+; ALL-NEXT: movq %rsi, %rax
+; ALL-NEXT: retq
entry:
-; CHECK-LABEL: bar:
-; CHECK: shldq %cl
%0 = shl i64 %y, %z
%1 = sub i64 64, %z
%2 = lshr i64 %x, %1
@@ -25,9 +34,13 @@ entry:
}
define i64 @un(i64 %x, i64 %y, i64 %z) nounwind readnone {
+; ALL-LABEL: un:
+; ALL: # BB#0: # %entry
+; ALL-NEXT: movl %edx, %ecx
+; ALL-NEXT: rorq %cl, %rdi
+; ALL-NEXT: movq %rdi, %rax
+; ALL-NEXT: retq
entry:
-; CHECK-LABEL: un:
-; CHECK: rorq %cl
%0 = lshr i64 %x, %z
%1 = sub i64 64, %z
%2 = shl i64 %x, %1
@@ -36,9 +49,13 @@ entry:
}
define i64 @bu(i64 %x, i64 %y, i64 %z) nounwind readnone {
+; ALL-LABEL: bu:
+; ALL: # BB#0: # %entry
+; ALL-NEXT: movl %edx, %ecx
+; ALL-NEXT: shrdq %cl, %rdi, %rsi
+; ALL-NEXT: movq %rsi, %rax
+; ALL-NEXT: retq
entry:
-; CHECK-LABEL: bu:
-; CHECK: shrdq %cl
%0 = lshr i64 %y, %z
%1 = sub i64 64, %z
%2 = shl i64 %x, %1
@@ -47,13 +64,23 @@ entry:
}
define i64 @xfoo(i64 %x, i64 %y, i64 %z) nounwind readnone {
-entry:
-; CHECK-LABEL: xfoo:
-; CHECK: rolq $7
+; X64-LABEL: xfoo:
+; X64: # BB#0: # %entry
+; X64-NEXT: rolq $7, %rdi
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: retq
+;
; SHLD-LABEL: xfoo:
-; SHLD: shldq $7
+; SHLD: # BB#0: # %entry
+; SHLD-NEXT: shldq $7, %rdi, %rdi
+; SHLD-NEXT: movq %rdi, %rax
+; SHLD-NEXT: retq
+;
; BMI2-LABEL: xfoo:
-; BMI2: rorxq $57
+; BMI2: # BB#0: # %entry
+; BMI2-NEXT: rorxq $57, %rdi, %rax
+; BMI2-NEXT: retq
+entry:
%0 = lshr i64 %x, 57
%1 = shl i64 %x, 7
%2 = or i64 %0, %1
@@ -61,13 +88,23 @@ entry:
}
define i64 @xfoop(i64* %p) nounwind readnone {
-entry:
-; CHECK-LABEL: xfoop:
-; CHECK: rolq $7
+; X64-LABEL: xfoop:
+; X64: # BB#0: # %entry
+; X64-NEXT: movq (%rdi), %rax
+; X64-NEXT: rolq $7, %rax
+; X64-NEXT: retq
+;
; SHLD-LABEL: xfoop:
-; SHLD: shldq $7
+; SHLD: # BB#0: # %entry
+; SHLD-NEXT: movq (%rdi), %rax
+; SHLD-NEXT: shldq $7, %rax, %rax
+; SHLD-NEXT: retq
+;
; BMI2-LABEL: xfoop:
-; BMI2: rorxq $57
+; BMI2: # BB#0: # %entry
+; BMI2-NEXT: rorxq $57, (%rdi), %rax
+; BMI2-NEXT: retq
+entry:
%x = load i64, i64* %p
%a = lshr i64 %x, 57
%b = shl i64 %x, 7
@@ -76,9 +113,12 @@ entry:
}
define i64 @xbar(i64 %x, i64 %y, i64 %z) nounwind readnone {
+; ALL-LABEL: xbar:
+; ALL: # BB#0: # %entry
+; ALL-NEXT: shrdq $57, %rsi, %rdi
+; ALL-NEXT: movq %rdi, %rax
+; ALL-NEXT: retq
entry:
-; CHECK-LABEL: xbar:
-; CHECK: shrdq $57
%0 = shl i64 %y, 7
%1 = lshr i64 %x, 57
%2 = or i64 %0, %1
@@ -86,13 +126,23 @@ entry:
}
define i64 @xun(i64 %x, i64 %y, i64 %z) nounwind readnone {
-entry:
-; CHECK-LABEL: xun:
-; CHECK: rolq $57
+; X64-LABEL: xun:
+; X64: # BB#0: # %entry
+; X64-NEXT: rolq $57, %rdi
+; X64-NEXT: movq %rdi, %rax
+; X64-NEXT: retq
+;
; SHLD-LABEL: xun:
-; SHLD: shldq $57
+; SHLD: # BB#0: # %entry
+; SHLD-NEXT: shldq $57, %rdi, %rdi
+; SHLD-NEXT: movq %rdi, %rax
+; SHLD-NEXT: retq
+;
; BMI2-LABEL: xun:
-; BMI2: rorxq $7
+; BMI2: # BB#0: # %entry
+; BMI2-NEXT: rorxq $7, %rdi, %rax
+; BMI2-NEXT: retq
+entry:
%0 = lshr i64 %x, 7
%1 = shl i64 %x, 57
%2 = or i64 %0, %1
@@ -100,13 +150,23 @@ entry:
}
define i64 @xunp(i64* %p) nounwind readnone {
-entry:
-; CHECK-LABEL: xunp:
-; CHECK: rolq $57
+; X64-LABEL: xunp:
+; X64: # BB#0: # %entry
+; X64-NEXT: movq (%rdi), %rax
+; X64-NEXT: rolq $57, %rax
+; X64-NEXT: retq
+;
; SHLD-LABEL: xunp:
-; SHLD: shldq $57
+; SHLD: # BB#0: # %entry
+; SHLD-NEXT: movq (%rdi), %rax
+; SHLD-NEXT: shldq $57, %rax, %rax
+; SHLD-NEXT: retq
+;
; BMI2-LABEL: xunp:
-; BMI2: rorxq $7
+; BMI2: # BB#0: # %entry
+; BMI2-NEXT: rorxq $7, (%rdi), %rax
+; BMI2-NEXT: retq
+entry:
%x = load i64, i64* %p
%a = lshr i64 %x, 7
%b = shl i64 %x, 57
@@ -115,9 +175,12 @@ entry:
}
define i64 @xbu(i64 %x, i64 %y, i64 %z) nounwind readnone {
+; ALL-LABEL: xbu:
+; ALL: # BB#0: # %entry
+; ALL-NEXT: shldq $57, %rsi, %rdi
+; ALL-NEXT: movq %rdi, %rax
+; ALL-NEXT: retq
entry:
-; CHECK-LABEL: xbu:
-; CHECK: shldq $57
%0 = lshr i64 %y, 7
%1 = shl i64 %x, 57
%2 = or i64 %0, %1
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