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| author | Sam Kolton <Sam.Kolton@amd.com> | 2017-06-27 15:02:23 +0000 |
|---|---|---|
| committer | Sam Kolton <Sam.Kolton@amd.com> | 2017-06-27 15:02:23 +0000 |
| commit | a179d25b99fec680d2430a07b6a35254c548e298 (patch) | |
| tree | d8aa864ec684eb692a0d520c8231df45f20047fb /llvm/test/CodeGen/X86/recip-fastmath2.ll | |
| parent | 0bd79f416a2416a88803cceb1a59c218bb7639d1 (diff) | |
| download | bcm5719-llvm-a179d25b99fec680d2430a07b6a35254c548e298.tar.gz bcm5719-llvm-a179d25b99fec680d2430a07b6a35254c548e298.zip | |
[AMDGPU] SDWA: several fixes for V_CVT and VOPC instructions
Summary:
1. Instruction V_CVT_U32_F32 allow omod operand (see SIInstrInfo.td:1435). In fact this operand shouldn't be allowed here. This fix checks if SDWA pseudo instruction has OMod operand and then copy it.
2. There were several problems with support of VOPC instructions in SDWA peephole pass.
Reviewers: tstellar, arsenm, vpykhtin, airlied, kzhuravl
Subscribers: wdng, nhaehnle, yaxunl, dstuttard, tpr, sarnex, t-tye
Differential Revision: https://reviews.llvm.org/D34626
llvm-svn: 306413
Diffstat (limited to 'llvm/test/CodeGen/X86/recip-fastmath2.ll')
0 files changed, 0 insertions, 0 deletions
