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authorPreston Gurd <preston.gurd@intel.com>2013-09-18 21:08:09 +0000
committerPreston Gurd <preston.gurd@intel.com>2013-09-18 21:08:09 +0000
commit457daddc9bd83d7951ef2a720ddf224b601bc97b (patch)
tree0676e21c179d103aec7db23c55da22f2707201e5 /llvm/test/CodeGen/X86/prefetch.ll
parent1c900bcf26777db2cb3cb6e3f552a21e0aa3acd6 (diff)
downloadbcm5719-llvm-457daddc9bd83d7951ef2a720ddf224b601bc97b.tar.gz
bcm5719-llvm-457daddc9bd83d7951ef2a720ddf224b601bc97b.zip
Verify that llvm can generate the prefetchw instruction when the CPU is
Atom Silvermont. Patch by Sriram Murali. llvm-svn: 190957
Diffstat (limited to 'llvm/test/CodeGen/X86/prefetch.ll')
-rw-r--r--llvm/test/CodeGen/X86/prefetch.ll2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/prefetch.ll b/llvm/test/CodeGen/X86/prefetch.ll
index efb51913c5c..08a913638b6 100644
--- a/llvm/test/CodeGen/X86/prefetch.ll
+++ b/llvm/test/CodeGen/X86/prefetch.ll
@@ -1,6 +1,7 @@
; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+sse -mattr=+prfchw | FileCheck %s -check-prefix=PRFCHW
+; RUN: llc < %s -mcpu=slm | FileCheck %s -check-prefix=SLM
; rdar://10538297
@@ -11,6 +12,7 @@ entry:
; CHECK: prefetcht0
; CHECK: prefetchnta
; PRFCHW: prefetchw
+; SLM: prefetchw
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1, i32 1 )
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2, i32 1 )
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 )
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