Revert r314886 "[X86] Improvement in CodeGen instruction selection for LEAs (re-applying post required revision changes.)"

It broke the Chromium / SQLite build; see PR34830.

> Summary:
>    1/  Operand folding during complex pattern matching for LEAs has been
>        extended, such that it promotes Scale to accommodate similar operand
>        appearing in the DAG.
>        e.g.
>          T1 = A + B
>          T2 = T1 + 10
>          T3 = T2 + A
>        For above DAG rooted at T3, X86AddressMode will no look like
>          Base = B , Index = A , Scale = 2 , Disp = 10
>
>    2/  During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
>        so that if there is an opportunity then complex LEAs (having 3 operands)
>        could be factored out.
>        e.g.
>          leal 1(%rax,%rcx,1), %rdx
>          leal 1(%rax,%rcx,2), %rcx
>        will be factored as following
>          leal 1(%rax,%rcx,1), %rdx
>          leal (%rdx,%rcx)   , %edx
>
>    3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
>       thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy
>
> Reviewed By: lsaba
>
> Subscribers: jmolloy, spatel, igorb, llvm-commits
>
>     Differential Revision: https://reviews.llvm.org/D35014

llvm-svn: 314919

1 files changed, 10 insertions, 10 deletions

diff --git a/llvm/test/CodeGen/X86/pr34634.ll b/llvm/test/CodeGen/X86/pr34634.ll
index 6eab7e465a8..6ebd6d87185 100644
--- a/llvm/test/CodeGen/X86/pr34634.ll
+++ b/llvm/test/CodeGen/X86/pr34634.ll
@@ -14,11 +14,11 @@ define void @fn1() local_unnamed_addr #0 {
 ; CHECK-NEXT:    movslq {{.*}}(%rip), %rax
 ; CHECK-NEXT:    leaq (%rax,%rax,4), %rcx
 ; CHECK-NEXT:    leaq (,%rax,4), %rdx
-; CHECK-NEXT:    movl a(%rdx,%rcx,8), %edx
-; CHECK-NEXT:    leaq (%rcx,%rax,4), %rcx
-; CHECK-NEXT:    leaq (%rcx,%rcx,2), %rcx
-; CHECK-NEXT:    addq %rax, %rcx
-; CHECK-NEXT:    movl %edx, b(%rcx,%rax,4)
+; CHECK-NEXT:    movl a(%rdx,%rcx,8), %ecx
+; CHECK-NEXT:    leaq (%rax,%rax,8), %rdx
+; CHECK-NEXT:    leaq (%rdx,%rdx,2), %rdx
+; CHECK-NEXT:    addq %rax, %rdx
+; CHECK-NEXT:    movl %ecx, b(%rdx,%rax,4)
 ; CHECK-NEXT:    retq
 entry:
   %0 = load i32, i32* @c, align 4, !tbaa !2
@@ -37,11 +37,11 @@ define i32 @main() local_unnamed_addr #0 {
 ; CHECK-NEXT:    movslq {{.*}}(%rip), %rax
 ; CHECK-NEXT:    leaq (%rax,%rax,4), %rcx
 ; CHECK-NEXT:    leaq (,%rax,4), %rdx
-; CHECK-NEXT:    movl a(%rdx,%rcx,8), %edx
-; CHECK-NEXT:    leaq (%rcx,%rax,4), %rcx
-; CHECK-NEXT:    leaq (%rcx,%rcx,2), %rcx
-; CHECK-NEXT:    addq %rax, %rcx
-; CHECK-NEXT:    movl %edx, b(%rcx,%rax,4)
+; CHECK-NEXT:    movl a(%rdx,%rcx,8), %ecx
+; CHECK-NEXT:    leaq (%rax,%rax,8), %rdx
+; CHECK-NEXT:    leaq (%rdx,%rdx,2), %rdx
+; CHECK-NEXT:    addq %rax, %rdx
+; CHECK-NEXT:    movl %ecx, b(%rdx,%rax,4)
 ; CHECK-NEXT:    xorl %eax, %eax
 ; CHECK-NEXT:    retq
 entry: