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authorSimon Pilgrim <llvm-dev@redking.me.uk>2015-03-07 05:52:42 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2015-03-07 05:52:42 +0000
commitbede80a4401162f130825d0b06a37027066f68b0 (patch)
tree49faaed285a3de1d255bf54bd7dfe365285081d1 /llvm/test/CodeGen/X86/pr14161.ll
parent58f8cc15c96c35789c4b50f182808a34b0ce4eb5 (diff)
downloadbcm5719-llvm-bede80a4401162f130825d0b06a37027066f68b0.tar.gz
bcm5719-llvm-bede80a4401162f130825d0b06a37027066f68b0.zip
[DAGCombiner] SCALAR_TO_VECTOR(EXTRACT_VECTOR_ELT(V,C)) -> VECTOR_SHUFFLE
This patch attempts to convert a SCALAR_TO_VECTOR using an operand from an EXTRACT_VECTOR_ELT into a VECTOR_SHUFFLE. This prevents many cases of spilling scalar data between the gpr + simd registers. At present the optimization only accepts cases where there is no TRUNC of the scalar type (i.e. all types must match). Differential Revision: http://reviews.llvm.org/D8132 llvm-svn: 231554
Diffstat (limited to 'llvm/test/CodeGen/X86/pr14161.ll')
-rw-r--r--llvm/test/CodeGen/X86/pr14161.ll5
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/X86/pr14161.ll b/llvm/test/CodeGen/X86/pr14161.ll
index b7084c02274..95c71405bc9 100644
--- a/llvm/test/CodeGen/X86/pr14161.ll
+++ b/llvm/test/CodeGen/X86/pr14161.ll
@@ -26,9 +26,8 @@ define <2 x i16> @bad(<4 x i32>*, <4 x i8>*) {
; CHECK: # BB#0: # %entry
; CHECK-NEXT: movdqa (%rdi), %xmm0
; CHECK-NEXT: pminud {{.*}}(%rip), %xmm0
-; CHECK-NEXT: pextrd $1, %xmm0, %eax
-; CHECK-NEXT: movd %eax, %xmm0
-; CHECK-NEXT: pmovzxwq %xmm0, %xmm0
+; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
+; CHECK-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
; CHECK-NEXT: retq
entry:
%2 = load <4 x i32>, <4 x i32>* %0, align 16
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