summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/X86/palignr-2.ll
diff options
context:
space:
mode:
authorSean Callanan <scallanan@apple.com>2009-11-20 22:28:42 +0000
committerSean Callanan <scallanan@apple.com>2009-11-20 22:28:42 +0000
commitc1f532e930608620d2e5877d421c9fa1e2589d93 (patch)
tree1759418ce717d646860032819c41b0067fb0f9b1 /llvm/test/CodeGen/X86/palignr-2.ll
parentb17d34906ae333a1f46e6f70315a20312208f36c (diff)
downloadbcm5719-llvm-c1f532e930608620d2e5877d421c9fa1e2589d93.tar.gz
bcm5719-llvm-c1f532e930608620d2e5877d421c9fa1e2589d93.zip
Recommitting PALIGNR shift width fixes.
Thanks to Daniel Dunbar for fixing clang intrinsics: http://llvm.org/viewvc/llvm-project?view=rev&revision=89499 llvm-svn: 89500
Diffstat (limited to 'llvm/test/CodeGen/X86/palignr-2.ll')
-rw-r--r--llvm/test/CodeGen/X86/palignr-2.ll6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/X86/palignr-2.ll b/llvm/test/CodeGen/X86/palignr-2.ll
index 2936641e95d..116d4c71814 100644
--- a/llvm/test/CodeGen/X86/palignr-2.ll
+++ b/llvm/test/CodeGen/X86/palignr-2.ll
@@ -9,12 +9,12 @@ define void @t1(<2 x i64> %a, <2 x i64> %b) nounwind ssp {
entry:
; CHECK: t1:
; palignr $3, %xmm1, %xmm0
- %0 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %a, <2 x i64> %b, i32 24) nounwind readnone
+ %0 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %a, <2 x i64> %b, i8 24) nounwind readnone
store <2 x i64> %0, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16
ret void
}
-declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i32) nounwind readnone
+declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i8) nounwind readnone
define void @t2() nounwind ssp {
entry:
@@ -22,7 +22,7 @@ entry:
; palignr $4, _b, %xmm0
%0 = load <2 x i64>* bitcast ([4 x i32]* @b to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1]
%1 = load <2 x i64>* bitcast ([4 x i32]* @a to <2 x i64>*), align 16 ; <<2 x i64>> [#uses=1]
- %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i32 32) nounwind readnone
+ %2 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %1, <2 x i64> %0, i8 32) nounwind readnone
store <2 x i64> %2, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16
ret void
}
OpenPOWER on IntegriCloud