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| author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
|---|---|---|
| committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
| commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
| tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/CodeGen/X86/lsr-reuse-trunc.ll | |
| parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
| download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip | |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/CodeGen/X86/lsr-reuse-trunc.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/lsr-reuse-trunc.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/X86/lsr-reuse-trunc.ll b/llvm/test/CodeGen/X86/lsr-reuse-trunc.ll index c3dbd602f1f..7f73b6b9d1e 100644 --- a/llvm/test/CodeGen/X86/lsr-reuse-trunc.ll +++ b/llvm/test/CodeGen/X86/lsr-reuse-trunc.ll @@ -14,7 +14,7 @@ define void @vvfloorf(float* nocapture %y, float* nocapture %x, i32* nocapture %n) nounwind { entry: - %0 = load i32* %n, align 4 + %0 = load i32, i32* %n, align 4 %1 = icmp sgt i32 %0, 0 br i1 %1, label %bb, label %return @@ -25,7 +25,7 @@ bb: %scevgep9 = bitcast float* %scevgep to <4 x float>* %scevgep10 = getelementptr float, float* %x, i64 %tmp %scevgep1011 = bitcast float* %scevgep10 to <4 x float>* - %2 = load <4 x float>* %scevgep1011, align 16 + %2 = load <4 x float>, <4 x float>* %scevgep1011, align 16 %3 = bitcast <4 x float> %2 to <4 x i32> %4 = and <4 x i32> %3, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647> %5 = bitcast <4 x i32> %4 to <4 x float> @@ -48,7 +48,7 @@ bb: store <4 x float> %19, <4 x float>* %scevgep9, align 16 %tmp12 = add i64 %tmp, 4 %tmp13 = trunc i64 %tmp12 to i32 - %20 = load i32* %n, align 4 + %20 = load i32, i32* %n, align 4 %21 = icmp sgt i32 %20, %tmp13 %indvar.next = add i64 %indvar, 1 br i1 %21, label %bb, label %return |
