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| author | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2018-10-30 15:04:40 +0000 |
|---|---|---|
| committer | Jonas Paulsson <paulsson@linux.vnet.ibm.com> | 2018-10-30 15:04:40 +0000 |
| commit | 611b533f1d544b85f1a98afbc9241deeb97d9497 (patch) | |
| tree | 4db26c1d883b521a32b55e1e3489edc8bd900fc2 /llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll | |
| parent | 023b1d19f3de5ed7cec535295bf0d7a9f99ea561 (diff) | |
| download | bcm5719-llvm-611b533f1d544b85f1a98afbc9241deeb97d9497.tar.gz bcm5719-llvm-611b533f1d544b85f1a98afbc9241deeb97d9497.zip | |
[SchedModel] Fix for read advance cycles with implicit pseudo operands.
The SchedModel allows the addition of ReadAdvances to express that certain
operands of the instructions are needed at a later point than the others.
RegAlloc may add pseudo operands that are not part of the instruction
descriptor, and therefore cannot have any read advance entries. This meant
that in some cases the desired read advance was nullified by such a pseudo
operand, which still had the original latency.
This patch fixes this by making sure that such pseudo operands get a zero
latency during DAG construction.
Review: Matthias Braun, Ulrich Weigand.
https://reviews.llvm.org/D49671
llvm-svn: 345606
Diffstat (limited to 'llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll b/llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll index 0b5ce8a4ffb..7a266235109 100644 --- a/llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll +++ b/llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll @@ -97,8 +97,8 @@ define void @t(i8* nocapture %in, i8* nocapture %out, i32* nocapture %rk, i32 %r ; ATOM-NEXT: pushq %r14 ; ATOM-NEXT: pushq %rbx ; ATOM-NEXT: ## kill: def $ecx killed $ecx def $rcx -; ATOM-NEXT: movl 4(%rdx), %eax ; ATOM-NEXT: movl (%rdx), %r15d +; ATOM-NEXT: movl 4(%rdx), %eax ; ATOM-NEXT: leaq 20(%rdx), %r14 ; ATOM-NEXT: movq _Te0@{{.*}}(%rip), %r9 ; ATOM-NEXT: movq _Te1@{{.*}}(%rip), %r8 @@ -116,8 +116,8 @@ define void @t(i8* nocapture %in, i8* nocapture %out, i32* nocapture %rk, i32 %r ; ATOM-NEXT: movzbl %bl, %eax ; ATOM-NEXT: movl (%r10,%rax,4), %eax ; ATOM-NEXT: xorl (%r8,%rbp,4), %r15d -; ATOM-NEXT: xorl -4(%r14), %r15d ; ATOM-NEXT: xorl (%r9,%rdi,4), %eax +; ATOM-NEXT: xorl -4(%r14), %r15d ; ATOM-NEXT: xorl (%r14), %eax ; ATOM-NEXT: addq $16, %r14 ; ATOM-NEXT: LBB0_1: ## %bb @@ -130,14 +130,14 @@ define void @t(i8* nocapture %in, i8* nocapture %out, i32* nocapture %rk, i32 %r ; ATOM-NEXT: movzbl %dil, %edi ; ATOM-NEXT: movl (%r8,%rdi,4), %ebx ; ATOM-NEXT: movzbl %r15b, %edi -; ATOM-NEXT: movl (%r10,%rdi,4), %edi ; ATOM-NEXT: xorl (%r9,%rbp,4), %ebx +; ATOM-NEXT: movl (%r10,%rdi,4), %edi ; ATOM-NEXT: xorl -12(%r14), %ebx ; ATOM-NEXT: xorl (%r9,%rax,4), %edi ; ATOM-NEXT: movl %ebx, %eax +; ATOM-NEXT: xorl -8(%r14), %edi ; ATOM-NEXT: shrl $24, %eax ; ATOM-NEXT: movl (%r9,%rax,4), %r15d -; ATOM-NEXT: xorl -8(%r14), %edi ; ATOM-NEXT: testq %r11, %r11 ; ATOM-NEXT: movl %edi, %eax ; ATOM-NEXT: jne LBB0_2 |
