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| author | Duncan Sands <baldrick@free.fr> | 2012-09-29 10:25:35 +0000 |
|---|---|---|
| committer | Duncan Sands <baldrick@free.fr> | 2012-09-29 10:25:35 +0000 |
| commit | fb9d30dd648c04fba2a1eb0c4366924e14eecd46 (patch) | |
| tree | 33b8a2e085a01c6dbbbce8fe3802af872fe69d40 /llvm/test/CodeGen/X86/loop-strength-reduce-2.ll | |
| parent | 261c9683e27ed70c930288a312fc27d6b7c2c7cd (diff) | |
| download | bcm5719-llvm-fb9d30dd648c04fba2a1eb0c4366924e14eecd46.tar.gz bcm5719-llvm-fb9d30dd648c04fba2a1eb0c4366924e14eecd46.zip | |
Speculatively revert commit 164885 (nadav) in the hope of ressurecting a pile of
buildbots. Original commit message:
A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work. We only handle these cases:
1. Consecutive stores where the values and consecutive loads. For example:
int a = p->a;
int b = p->b;
q->a = a;
q->b = b;
2. Consecutive stores where the values are constants. Foe example:
q->a = 4;
q->b = 5;
llvm-svn: 164890
Diffstat (limited to 'llvm/test/CodeGen/X86/loop-strength-reduce-2.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/loop-strength-reduce-2.ll | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce-2.ll b/llvm/test/CodeGen/X86/loop-strength-reduce-2.ll index b094fed2f67..b546462b684 100644 --- a/llvm/test/CodeGen/X86/loop-strength-reduce-2.ll +++ b/llvm/test/CodeGen/X86/loop-strength-reduce-2.ll @@ -1,18 +1,20 @@ -; RUN: llc < %s -march=x86 -mcpu=corei7 -relocation-model=pic | FileCheck %s -check-prefix=PIC -; RUN: llc < %s -march=x86 -mcpu=corei7 -relocation-model=static | FileCheck %s -check-prefix=STATIC +; RUN: llc < %s -march=x86 -relocation-model=pic | FileCheck %s -check-prefix=PIC +; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s -check-prefix=STATIC ; ; Make sure the common loop invariant A is hoisted up to preheader, ; since too many registers are needed to subsume it into the addressing modes. ; It's safe to sink A in when it's not pic. ; PIC: align -; PIC: movlpd %xmm0, -4([[REG:%e[a-z]+]]) +; PIC: movl $4, -4([[REG:%e[a-z]+]]) +; PIC: movl $5, ([[REG]]) ; PIC: addl $4, [[REG]] ; PIC: decl {{%e[[a-z]+}} ; PIC: jne ; STATIC: align -; STATIC: movlpd %xmm0, -4(%ecx) +; STATIC: movl $4, -4(%ecx) +; STATIC: movl $5, (%ecx) ; STATIC: addl $4, %ecx ; STATIC: decl %eax ; STATIC: jne |
