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| author | Hans Wennborg <hans@hanshq.net> | 2017-10-04 17:54:06 +0000 |
|---|---|---|
| committer | Hans Wennborg <hans@hanshq.net> | 2017-10-04 17:54:06 +0000 |
| commit | 2a6c9adb2f30f725579bcc8922583798a5b0feea (patch) | |
| tree | 63dd6580649e5d0d4bbb7c9d1018f108ab348ca2 /llvm/test/CodeGen/X86/lea-opt-cse2.ll | |
| parent | 084400bad95254f612c2eb0bbd4a614b01ca2a66 (diff) | |
| download | bcm5719-llvm-2a6c9adb2f30f725579bcc8922583798a5b0feea.tar.gz bcm5719-llvm-2a6c9adb2f30f725579bcc8922583798a5b0feea.zip | |
Revert r314886 "[X86] Improvement in CodeGen instruction selection for LEAs (re-applying post required revision changes.)"
It broke the Chromium / SQLite build; see PR34830.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy
>
> Reviewed By: lsaba
>
> Subscribers: jmolloy, spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 314919
Diffstat (limited to 'llvm/test/CodeGen/X86/lea-opt-cse2.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/lea-opt-cse2.ll | 42 |
1 files changed, 24 insertions, 18 deletions
diff --git a/llvm/test/CodeGen/X86/lea-opt-cse2.ll b/llvm/test/CodeGen/X86/lea-opt-cse2.ll index 73aeea06e6a..573b93dde43 100644 --- a/llvm/test/CodeGen/X86/lea-opt-cse2.ll +++ b/llvm/test/CodeGen/X86/lea-opt-cse2.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+slow-3ops-lea | FileCheck %s -check-prefix=X64 -; RUN: llc < %s -mtriple=i686-unknown -mattr=+slow-3ops-lea | FileCheck %s -check-prefix=X86 +; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86 %struct.SA = type { i32 , i32 , i32 , i32 , i32}; @@ -10,41 +10,47 @@ define void @foo(%struct.SA* nocapture %ctx, i32 %n) local_unnamed_addr #0 { ; X64-NEXT: .p2align 4, 0x90 ; X64-NEXT: .LBB0_1: # %loop ; X64-NEXT: # =>This Inner Loop Header: Depth=1 -; X64-NEXT: movl 16(%rdi), %eax -; X64-NEXT: movl (%rdi), %ecx -; X64-NEXT: addl %eax, %ecx -; X64-NEXT: incl %ecx -; X64-NEXT: movl %ecx, 12(%rdi) +; X64-NEXT: movl (%rdi), %eax +; X64-NEXT: movl 16(%rdi), %ecx +; X64-NEXT: leal 1(%rax,%rcx), %edx +; X64-NEXT: movl %edx, 12(%rdi) ; X64-NEXT: decl %esi ; X64-NEXT: jne .LBB0_1 ; X64-NEXT: # BB#2: # %exit -; X64-NEXT: addl %eax, %ecx -; X64-NEXT: movl %ecx, 16(%rdi) +; X64-NEXT: addl %ecx, %eax +; X64-NEXT: leal 1(%rcx,%rax), %eax +; X64-NEXT: movl %eax, 16(%rdi) ; X64-NEXT: retq ; ; X86-LABEL: foo: ; X86: # BB#0: # %entry -; X86-NEXT: pushl %esi +; X86-NEXT: pushl %edi ; X86-NEXT: .Lcfi0: ; X86-NEXT: .cfi_def_cfa_offset 8 +; X86-NEXT: pushl %esi ; X86-NEXT: .Lcfi1: -; X86-NEXT: .cfi_offset %esi, -8 +; X86-NEXT: .cfi_def_cfa_offset 12 +; X86-NEXT: .Lcfi2: +; X86-NEXT: .cfi_offset %esi, -12 +; X86-NEXT: .Lcfi3: +; X86-NEXT: .cfi_offset %edi, -8 ; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax ; X86-NEXT: .p2align 4, 0x90 ; X86-NEXT: .LBB0_1: # %loop ; X86-NEXT: # =>This Inner Loop Header: Depth=1 -; X86-NEXT: movl 16(%eax), %edx -; X86-NEXT: movl (%eax), %esi -; X86-NEXT: addl %edx, %esi -; X86-NEXT: incl %esi -; X86-NEXT: movl %esi, 12(%eax) +; X86-NEXT: movl (%eax), %edx +; X86-NEXT: movl 16(%eax), %esi +; X86-NEXT: leal 1(%edx,%esi), %edi +; X86-NEXT: movl %edi, 12(%eax) ; X86-NEXT: decl %ecx ; X86-NEXT: jne .LBB0_1 ; X86-NEXT: # BB#2: # %exit -; X86-NEXT: addl %edx, %esi -; X86-NEXT: movl %esi, 16(%eax) +; X86-NEXT: addl %esi, %edx +; X86-NEXT: leal 1(%esi,%edx), %ecx +; X86-NEXT: movl %ecx, 16(%eax) ; X86-NEXT: popl %esi +; X86-NEXT: popl %edi ; X86-NEXT: retl entry: br label %loop |

