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authorSanjay Patel <spatel@rotateright.com>2017-09-19 13:43:09 +0000
committerSanjay Patel <spatel@rotateright.com>2017-09-19 13:43:09 +0000
commitbd7958d7ca8fc4194423da54f8d9f421153aed0a (patch)
tree2a0626d3aaea6c47b7f3f53d2aa4c4501f265e8c /llvm/test/CodeGen/X86/lea-3.ll
parent10ad32b76d5bf5546969c743f3d4666c48373a67 (diff)
downloadbcm5719-llvm-bd7958d7ca8fc4194423da54f8d9f421153aed0a.tar.gz
bcm5719-llvm-bd7958d7ca8fc4194423da54f8d9f421153aed0a.zip
[x86] regenerate checks; NFC
llvm-svn: 313631
Diffstat (limited to 'llvm/test/CodeGen/X86/lea-3.ll')
-rw-r--r--llvm/test/CodeGen/X86/lea-3.ll89
1 files changed, 76 insertions, 13 deletions
diff --git a/llvm/test/CodeGen/X86/lea-3.ll b/llvm/test/CodeGen/X86/lea-3.ll
index a56403a24b0..5b009d69008 100644
--- a/llvm/test/CodeGen/X86/lea-3.ll
+++ b/llvm/test/CodeGen/X86/lea-3.ll
@@ -1,24 +1,87 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-nacl | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=LNX1
+; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s --check-prefix=LNX2
+; RUN: llc < %s -mtriple=x86_64-nacl | FileCheck %s --check-prefix=NACL
+; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=WIN
-; CHECK: leaq (,[[A0:%rdi|%rcx]],4), %rax
define i64 @test2(i64 %a) {
- %tmp2 = shl i64 %a, 2
+; LNX1-LABEL: test2:
+; LNX1: # BB#0:
+; LNX1-NEXT: leaq (,%rdi,4), %rax
+; LNX1-NEXT: orq %rdi, %rax
+; LNX1-NEXT: retq
+;
+; LNX2-LABEL: test2:
+; LNX2: # BB#0:
+; LNX2-NEXT: leaq (,%rdi,4), %rax
+; LNX2-NEXT: orq %rdi, %rax
+; LNX2-NEXT: retq
+;
+; NACL-LABEL: test2:
+; NACL: # BB#0:
+; NACL-NEXT: leaq (,%rdi,4), %rax
+; NACL-NEXT: orq %rdi, %rax
+; NACL-NEXT: retq
+;
+; WIN-LABEL: test2:
+; WIN: # BB#0:
+; WIN-NEXT: leaq (,%rcx,4), %rax
+; WIN-NEXT: orq %rcx, %rax
+; WIN-NEXT: retq
+ %tmp2 = shl i64 %a, 2
%tmp3 = or i64 %tmp2, %a
- ret i64 %tmp3
+ ret i64 %tmp3
}
-; CHECK: leal ([[A0]],[[A0]],2), %eax
define i32 @test(i32 %a) {
- %tmp2 = mul i32 %a, 3 ; <i32> [#uses=1]
- ret i32 %tmp2
+; LNX1-LABEL: test:
+; LNX1: # BB#0:
+; LNX1-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; LNX1-NEXT: leal (%rdi,%rdi,2), %eax
+; LNX1-NEXT: retq
+;
+; LNX2-LABEL: test:
+; LNX2: # BB#0:
+; LNX2-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; LNX2-NEXT: leal (%rdi,%rdi,2), %eax
+; LNX2-NEXT: retq
+;
+; NACL-LABEL: test:
+; NACL: # BB#0:
+; NACL-NEXT: # kill: %EDI<def> %EDI<kill> %RDI<def>
+; NACL-NEXT: leal (%rdi,%rdi,2), %eax
+; NACL-NEXT: retq
+;
+; WIN-LABEL: test:
+; WIN: # BB#0:
+; WIN-NEXT: # kill: %ECX<def> %ECX<kill> %RCX<def>
+; WIN-NEXT: leal (%rcx,%rcx,2), %eax
+; WIN-NEXT: retq
+ %tmp2 = mul i32 %a, 3
+ ret i32 %tmp2
}
-; CHECK: leaq (,[[A0]],8), %rax
define i64 @test3(i64 %a) {
- %tmp2 = shl i64 %a, 3
- ret i64 %tmp2
+; LNX1-LABEL: test3:
+; LNX1: # BB#0:
+; LNX1-NEXT: leaq (,%rdi,8), %rax
+; LNX1-NEXT: retq
+;
+; LNX2-LABEL: test3:
+; LNX2: # BB#0:
+; LNX2-NEXT: leaq (,%rdi,8), %rax
+; LNX2-NEXT: retq
+;
+; NACL-LABEL: test3:
+; NACL: # BB#0:
+; NACL-NEXT: leaq (,%rdi,8), %rax
+; NACL-NEXT: retq
+;
+; WIN-LABEL: test3:
+; WIN: # BB#0:
+; WIN-NEXT: leaq (,%rcx,8), %rax
+; WIN-NEXT: retq
+ %tmp2 = shl i64 %a, 3
+ ret i64 %tmp2
}
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