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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-11-10 21:57:42 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-11-10 21:57:42 +0000 |
| commit | fe3a54371dda450d8b687f918d9db483f32e80d3 (patch) | |
| tree | 9a77f5d27c1c846507116b3392d6f0490147c52e /llvm/test/CodeGen/X86/known-bits-vector.ll | |
| parent | 7e0a4b8fdf4de0f6bb62b9d6baf80f1037791d72 (diff) | |
| download | bcm5719-llvm-fe3a54371dda450d8b687f918d9db483f32e80d3.tar.gz bcm5719-llvm-fe3a54371dda450d8b687f918d9db483f32e80d3.zip | |
[SelectionDAG] Add support for splatted vectors in SUB opcode
llvm-svn: 286509
Diffstat (limited to 'llvm/test/CodeGen/X86/known-bits-vector.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/known-bits-vector.ll | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/X86/known-bits-vector.ll b/llvm/test/CodeGen/X86/known-bits-vector.ll index 7cc6bfb3745..d7f27382e8b 100644 --- a/llvm/test/CodeGen/X86/known-bits-vector.ll +++ b/llvm/test/CodeGen/X86/known-bits-vector.ll @@ -207,18 +207,12 @@ define <4 x i32> @knownbits_mask_trunc_shuffle_shl(<4 x i64> %a0) nounwind { define <4 x i32> @knownbits_sub_lshr(<4 x i32> %a0) nounwind { ; X32-LABEL: knownbits_sub_lshr: ; X32: # BB#0: -; X32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 -; X32-NEXT: vmovdqa {{.*#+}} xmm1 = [255,255,255,255] -; X32-NEXT: vpsubd %xmm0, %xmm1, %xmm0 -; X32-NEXT: vpsrld $22, %xmm0, %xmm0 +; X32-NEXT: vxorps %xmm0, %xmm0, %xmm0 ; X32-NEXT: retl ; ; X64-LABEL: knownbits_sub_lshr: ; X64: # BB#0: -; X64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 -; X64-NEXT: vmovdqa {{.*#+}} xmm1 = [255,255,255,255] -; X64-NEXT: vpsubd %xmm0, %xmm1, %xmm0 -; X64-NEXT: vpsrld $22, %xmm0, %xmm0 +; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0 ; X64-NEXT: retq %1 = and <4 x i32> %a0, <i32 15, i32 15, i32 15, i32 15> %2 = sub <4 x i32> <i32 255, i32 255, i32 255, i32 255>, %1 |
