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authorSanjay Patel <spatel@rotateright.com>2019-07-15 18:17:23 +0000
committerSanjay Patel <spatel@rotateright.com>2019-07-15 18:17:23 +0000
commiteb99165b97b79c3ccc7b5ebcd445a98b4240e171 (patch)
treebbe973153fccc1cd6af4e679242f17357166c594 /llvm/test/CodeGen/X86/known-bits-vector.ll
parent032e3c468fab3ffc033db219314c2151c6bda917 (diff)
downloadbcm5719-llvm-eb99165b97b79c3ccc7b5ebcd445a98b4240e171.tar.gz
bcm5719-llvm-eb99165b97b79c3ccc7b5ebcd445a98b4240e171.zip
[x86] try to keep FP casted+truncated+extracted vector element out of GPRs
inttofp (trunc (extelt X, 0)) --> inttofp (extelt (bitcast X), 0) We have pseudo-vectorization of scalar int to FP casts, so this tries to make that more likely by replacing a truncate with a bitcast. I didn't see any test diffs starting from 'uitofp', so I left that as a TODO. We can't only match the shorter trunc+extract pattern because there's an opposing transform somewhere, so we infinite loop. Waiting to try this during lowering is another possibility. A motivating case is shown in PR39975 and included in the test diffs here: https://bugs.llvm.org/show_bug.cgi?id=39975 Differential Revision: https://reviews.llvm.org/D64710 llvm-svn: 366098
Diffstat (limited to 'llvm/test/CodeGen/X86/known-bits-vector.ll')
-rw-r--r--llvm/test/CodeGen/X86/known-bits-vector.ll5
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/X86/known-bits-vector.ll b/llvm/test/CodeGen/X86/known-bits-vector.ll
index a35cd839739..067ac9a6f7e 100644
--- a/llvm/test/CodeGen/X86/known-bits-vector.ll
+++ b/llvm/test/CodeGen/X86/known-bits-vector.ll
@@ -33,9 +33,8 @@ define float @knownbits_mask_extract_uitofp(<2 x i64> %a0) nounwind {
;
; X64-LABEL: knownbits_mask_extract_uitofp:
; X64: # %bb.0:
-; X64-NEXT: vmovq %xmm0, %rax
-; X64-NEXT: movzwl %ax, %eax
-; X64-NEXT: vcvtsi2ss %eax, %xmm1, %xmm0
+; X64-NEXT: vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
+; X64-NEXT: vcvtdq2ps %xmm0, %xmm0
; X64-NEXT: retq
%1 = and <2 x i64> %a0, <i64 65535, i64 -1>
%2 = extractelement <2 x i64> %1, i32 0
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