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authorSimon Pilgrim <llvm-dev@redking.me.uk>2016-12-06 12:12:20 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2016-12-06 12:12:20 +0000
commitae63dd10f89acd8373e800d71e4d15ef905de1f7 (patch)
treefc3ea6e55153fceb0fa009e5657644bdc4e02f40 /llvm/test/CodeGen/X86/known-bits-vector.ll
parent15748f492123053edda8ab18140630ad9efa7f76 (diff)
downloadbcm5719-llvm-ae63dd10f89acd8373e800d71e4d15ef905de1f7.tar.gz
bcm5719-llvm-ae63dd10f89acd8373e800d71e4d15ef905de1f7.zip
[X86] Add tests to show missed opportunities to calculate knownbits in SMAX/SMIN/UMAX/UMIN
llvm-svn: 288801
Diffstat (limited to 'llvm/test/CodeGen/X86/known-bits-vector.ll')
-rw-r--r--llvm/test/CodeGen/X86/known-bits-vector.ll94
1 files changed, 94 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/known-bits-vector.ll b/llvm/test/CodeGen/X86/known-bits-vector.ll
index 4bb8d776477..663a1c33fbc 100644
--- a/llvm/test/CodeGen/X86/known-bits-vector.ll
+++ b/llvm/test/CodeGen/X86/known-bits-vector.ll
@@ -379,3 +379,97 @@ define <4 x float> @knownbits_lshr_bitcast_shuffle_uitofp(<2 x i64> %a0, <4 x i3
%4 = uitofp <4 x i32> %3 to <4 x float>
ret <4 x float> %4
}
+
+define <4 x float> @knownbits_smax_smin_shuffle_uitofp(<4 x i32> %a0) {
+; X32-LABEL: knownbits_smax_smin_shuffle_uitofp:
+; X32: # BB#0:
+; X32-NEXT: vpminsd {{\.LCPI.*}}, %xmm0, %xmm0
+; X32-NEXT: vpmaxsd {{\.LCPI.*}}, %xmm0, %xmm0
+; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
+; X32-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
+; X32-NEXT: vpsrld $16, %xmm0, %xmm0
+; X32-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
+; X32-NEXT: vaddps {{\.LCPI.*}}, %xmm0, %xmm0
+; X32-NEXT: vaddps %xmm0, %xmm1, %xmm0
+; X32-NEXT: retl
+;
+; X64-LABEL: knownbits_smax_smin_shuffle_uitofp:
+; X64: # BB#0:
+; X64-NEXT: vpminsd {{.*}}(%rip), %xmm0, %xmm0
+; X64-NEXT: vpmaxsd {{.*}}(%rip), %xmm0, %xmm0
+; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
+; X64-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
+; X64-NEXT: vpsrld $16, %xmm0, %xmm0
+; X64-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
+; X64-NEXT: vaddps {{.*}}(%rip), %xmm0, %xmm0
+; X64-NEXT: vaddps %xmm0, %xmm1, %xmm0
+; X64-NEXT: retq
+ %1 = call <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32> %a0, <4 x i32> <i32 0, i32 -65535, i32 -65535, i32 0>)
+ %2 = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %1, <4 x i32> <i32 65535, i32 -1, i32 -1, i32 131071>)
+ %3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 3, i32 3>
+ %4 = uitofp <4 x i32> %3 to <4 x float>
+ ret <4 x float> %4
+}
+declare <4 x i32> @llvm.x86.sse41.pminsd(<4 x i32>, <4 x i32>) nounwind readnone
+declare <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32>, <4 x i32>) nounwind readnone
+
+define <4 x float> @knownbits_umax_shuffle_uitofp(<4 x i32> %a0) {
+; X32-LABEL: knownbits_umax_shuffle_uitofp:
+; X32: # BB#0:
+; X32-NEXT: vpmaxud {{\.LCPI.*}}, %xmm0, %xmm0
+; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
+; X32-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
+; X32-NEXT: vpsrld $16, %xmm0, %xmm0
+; X32-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
+; X32-NEXT: vaddps {{\.LCPI.*}}, %xmm0, %xmm0
+; X32-NEXT: vaddps %xmm0, %xmm1, %xmm0
+; X32-NEXT: retl
+;
+; X64-LABEL: knownbits_umax_shuffle_uitofp:
+; X64: # BB#0:
+; X64-NEXT: vpmaxud {{.*}}(%rip), %xmm0, %xmm0
+; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
+; X64-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
+; X64-NEXT: vpsrld $16, %xmm0, %xmm0
+; X64-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
+; X64-NEXT: vaddps {{.*}}(%rip), %xmm0, %xmm0
+; X64-NEXT: vaddps %xmm0, %xmm1, %xmm0
+; X64-NEXT: retq
+ %1 = call <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32> %a0, <4 x i32> <i32 65535, i32 -1, i32 -1, i32 262143>)
+ %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 3, i32 3>
+ %3 = uitofp <4 x i32> %2 to <4 x float>
+ ret <4 x float> %3
+}
+declare <4 x i32> @llvm.x86.sse41.pmaxud(<4 x i32>, <4 x i32>) nounwind readnone
+
+define <4 x float> @knownbits_umin_shl_shuffle_uitofp(<4 x i32> %a0) {
+; X32-LABEL: knownbits_umin_shl_shuffle_uitofp:
+; X32: # BB#0:
+; X32-NEXT: vpminud {{\.LCPI.*}}, %xmm0, %xmm0
+; X32-NEXT: vpslld $16, %xmm0, %xmm0
+; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
+; X32-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
+; X32-NEXT: vpsrld $16, %xmm0, %xmm0
+; X32-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
+; X32-NEXT: vaddps {{\.LCPI.*}}, %xmm0, %xmm0
+; X32-NEXT: vaddps %xmm0, %xmm1, %xmm0
+; X32-NEXT: retl
+;
+; X64-LABEL: knownbits_umin_shl_shuffle_uitofp:
+; X64: # BB#0:
+; X64-NEXT: vpminud {{.*}}(%rip), %xmm0, %xmm0
+; X64-NEXT: vpslld $16, %xmm0, %xmm0
+; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,3,3]
+; X64-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
+; X64-NEXT: vpsrld $16, %xmm0, %xmm0
+; X64-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
+; X64-NEXT: vaddps {{.*}}(%rip), %xmm0, %xmm0
+; X64-NEXT: vaddps %xmm0, %xmm1, %xmm0
+; X64-NEXT: retq
+ %1 = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %a0, <4 x i32> <i32 65536, i32 -1, i32 -1, i32 262143>)
+ %2 = shl <4 x i32> %1, <i32 16, i32 16, i32 16, i32 16>
+ %3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 3, i32 3>
+ %4 = uitofp <4 x i32> %3 to <4 x float>
+ ret <4 x float> %4
+}
+declare <4 x i32> @llvm.x86.sse41.pminud(<4 x i32>, <4 x i32>) nounwind readnone
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