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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-11-11 11:33:21 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-11-11 11:33:21 +0000 |
| commit | 08dedfc5892ffba346a7843db0316275dbac80e1 (patch) | |
| tree | b61d5231c779f16ce4915de58110c7f7bcadb9da /llvm/test/CodeGen/X86/known-bits-vector.ll | |
| parent | 813721e98a1811df567938a8e68cd0d2ff674c96 (diff) | |
| download | bcm5719-llvm-08dedfc5892ffba346a7843db0316275dbac80e1.tar.gz bcm5719-llvm-08dedfc5892ffba346a7843db0316275dbac80e1.zip | |
[X86] Add knownbits vector BSWAP test
In preparation for demandedelts support
llvm-svn: 286579
Diffstat (limited to 'llvm/test/CodeGen/X86/known-bits-vector.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/known-bits-vector.ll | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/known-bits-vector.ll b/llvm/test/CodeGen/X86/known-bits-vector.ll index e6bec38ecd5..0cdd1f34a99 100644 --- a/llvm/test/CodeGen/X86/known-bits-vector.ll +++ b/llvm/test/CodeGen/X86/known-bits-vector.ll @@ -305,3 +305,25 @@ define <4 x i32> @knownbits_mask_srem_shuffle_lshr(<4 x i32> %a0) nounwind { %4 = lshr <4 x i32> %3, <i32 22, i32 22, i32 22, i32 22> ret <4 x i32> %4 } + +define <4 x i32> @knownbits_mask_bswap_shuffle_shl(<4 x i32> %a0) nounwind { +; X32-LABEL: knownbits_mask_bswap_shuffle_shl: +; X32: # BB#0: +; X32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 +; X32-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,3,2,1,0,15,14,13,12,15,14,13,12] +; X32-NEXT: vpslld $22, %xmm0, %xmm0 +; X32-NEXT: retl +; +; X64-LABEL: knownbits_mask_bswap_shuffle_shl: +; X64: # BB#0: +; X64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 +; X64-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,3,2,1,0,15,14,13,12,15,14,13,12] +; X64-NEXT: vpslld $22, %xmm0, %xmm0 +; X64-NEXT: retq + %1 = and <4 x i32> %a0, <i32 32767, i32 -1, i32 -1, i32 32767> + %2 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %1) + %3 = shufflevector <4 x i32> %2, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 3, i32 3> + %4 = shl <4 x i32> %3, <i32 22, i32 22, i32 22, i32 22> + ret <4 x i32> %4 +} +declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) |
