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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-08-24 18:07:53 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-08-24 18:07:53 +0000 |
| commit | 941bd6bbae6ba1fbf3d46cfb365d1015703ef448 (patch) | |
| tree | 8eddc2a47b1117c80aff16e57288bb09d505d194 /llvm/test/CodeGen/X86/insertps-combine.ll | |
| parent | 26d9c41ff6b863253e1e9b17bd5acffc30ead692 (diff) | |
| download | bcm5719-llvm-941bd6bbae6ba1fbf3d46cfb365d1015703ef448.tar.gz bcm5719-llvm-941bd6bbae6ba1fbf3d46cfb365d1015703ef448.zip | |
[X86][SSE] Add support for combining VZEXT_MOVL target shuffles
Includes adding more general support for the pattern: VZEXT_MOVL(VZEXT_LOAD(ptr)) -> VZEXT_LOAD(ptr)
This has unearthed a couple of latent poor codegen issues (MINSS/MAXSS scalar load folding and MOVDDUP/BROADCAST load folding patterns), which will be fixed shortly.
Its also reduced a couple of tests so that they no longer reach the instruction threshold necessary to be combined to PSHUFB (see PR26183).
llvm-svn: 279646
Diffstat (limited to 'llvm/test/CodeGen/X86/insertps-combine.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/insertps-combine.ll | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/insertps-combine.ll b/llvm/test/CodeGen/X86/insertps-combine.ll index b55a029ea65..e801334ec71 100644 --- a/llvm/test/CodeGen/X86/insertps-combine.ll +++ b/llvm/test/CodeGen/X86/insertps-combine.ll @@ -112,14 +112,12 @@ define <4 x float> @shuffle_v4f32_z06z(<4 x float> %a, <4 x float> %b) { define <4 x float> @shuffle_v4f32_05zz(<4 x float> %a, <4 x float> %b) { ; SSE-LABEL: shuffle_v4f32_05zz: ; SSE: # BB#0: -; SSE-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3] -; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero +; SSE-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[1],zero,zero ; SSE-NEXT: retq ; ; AVX-LABEL: shuffle_v4f32_05zz: ; AVX: # BB#0: -; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3] -; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero +; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[1],zero,zero ; AVX-NEXT: retq %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 undef, i32 undef> %shuffle1 = shufflevector <4 x float> %shuffle, <4 x float> <float undef, float undef, float 0.000000e+00, float 0.000000e+00>, <4 x i32> <i32 0, i32 1, i32 6, i32 7> |
