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| author | Craig Topper <craig.topper@intel.com> | 2019-07-02 17:51:02 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-07-02 17:51:02 +0000 |
| commit | cffbaa93b72b307904935c380f90d49d00c7ecdc (patch) | |
| tree | a31e28a995d70ea4c8c32a9287f21210880fe0eb /llvm/test/CodeGen/X86/insert-into-constant-vector.ll | |
| parent | 36face4c1df75c1e4e82c3f26b0b98495af9359e (diff) | |
| download | bcm5719-llvm-cffbaa93b72b307904935c380f90d49d00c7ecdc.tar.gz bcm5719-llvm-cffbaa93b72b307904935c380f90d49d00c7ecdc.zip | |
[X86] Add patterns to select (scalar_to_vector (loadf32)) as (V)MOVSSrm instead of COPY_TO_REGCLASS + (V)MOVSSrm_alt.
Similar for (V)MOVSD. Ultimately, I'd like to see about folding
scalar_to_vector+load to vzload. Which would select as (V)MOVSSrm
so this is closer to that.
llvm-svn: 364948
Diffstat (limited to 'llvm/test/CodeGen/X86/insert-into-constant-vector.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/insert-into-constant-vector.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/X86/insert-into-constant-vector.ll b/llvm/test/CodeGen/X86/insert-into-constant-vector.ll index 9d33a8bc447..579d2aa7d48 100644 --- a/llvm/test/CodeGen/X86/insert-into-constant-vector.ll +++ b/llvm/test/CodeGen/X86/insert-into-constant-vector.ll @@ -168,8 +168,8 @@ define <2 x i64> @elt0_v2i64(i64 %x) { define <4 x float> @elt1_v4f32(float %x) { ; X32SSE2-LABEL: elt1_v4f32: ; X32SSE2: # %bb.0: -; X32SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; X32SSE2-NEXT: movaps {{.*#+}} xmm1 = <4.2E+1,u,2.0E+0,3.0E+0> +; X32SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; X32SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0] ; X32SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3] ; X32SSE2-NEXT: retl @@ -305,8 +305,8 @@ define <8 x i32> @elt7_v8i32(i32 %x) { define <8 x float> @elt6_v8f32(float %x) { ; X32SSE2-LABEL: elt6_v8f32: ; X32SSE2: # %bb.0: -; X32SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; X32SSE2-NEXT: movaps {{.*#+}} xmm1 = <4.0E+0,5.0E+0,u,7.0E+0> +; X32SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; X32SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0] ; X32SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2] ; X32SSE2-NEXT: movaps {{.*#+}} xmm0 = [4.2E+1,1.0E+0,2.0E+0,3.0E+0] |
