Split the Add, Sub, and Mul instruction opcodes into separate

integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.

For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.

This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt

llvm-svn: 72897

1 files changed, 1 insertions, 1 deletions

diff --git a/llvm/test/CodeGen/X86/inline-asm-x-scalar.ll b/llvm/test/CodeGen/X86/inline-asm-x-scalar.ll
index d1bac0c3b27..aafbbd1fd02 100644
--- a/llvm/test/CodeGen/X86/inline-asm-x-scalar.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-x-scalar.ll
@@ -17,7 +17,7 @@ define void @test3() {
 
 define void @test4() {
         %tmp1 = tail call float asm "", "=x,0,~{dirflag},~{fpsr},~{flags}"( float 0x47EFFFFFE0000000 ); <float> [#uses=1]
-        %tmp4 = sub float %tmp1, 0x3810000000000000             ; <float> [#uses=1]
+        %tmp4 = fsub float %tmp1, 0x3810000000000000             ; <float> [#uses=1]
         tail call void asm sideeffect "", "x,~{dirflag},~{fpsr},~{flags}"( float %tmp4 )
         ret void
 }