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author | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
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committer | David Blaikie <dblaikie@gmail.com> | 2015-02-27 21:17:42 +0000 |
commit | a79ac14fa68297f9888bc70a10df5ed9b8864e38 (patch) | |
tree | 8d8217a8928e3ee599bdde405e2e178b3a55b645 /llvm/test/CodeGen/X86/inline-asm-fpstack.ll | |
parent | 83687fb9e654c9d0086e7f6b728c26fa0b729e71 (diff) | |
download | bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.tar.gz bcm5719-llvm-a79ac14fa68297f9888bc70a10df5ed9b8864e38.zip |
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
Diffstat (limited to 'llvm/test/CodeGen/X86/inline-asm-fpstack.ll')
-rw-r--r-- | llvm/test/CodeGen/X86/inline-asm-fpstack.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/X86/inline-asm-fpstack.ll b/llvm/test/CodeGen/X86/inline-asm-fpstack.ll index bb3778a2811..220eb72d691 100644 --- a/llvm/test/CodeGen/X86/inline-asm-fpstack.ll +++ b/llvm/test/CodeGen/X86/inline-asm-fpstack.ll @@ -169,11 +169,11 @@ entry: ; CHECK: testPR4485 define void @testPR4485(x86_fp80* %a) { entry: - %0 = load x86_fp80* %a, align 16 + %0 = load x86_fp80, x86_fp80* %a, align 16 %1 = fmul x86_fp80 %0, 0xK4006B400000000000000 %2 = fmul x86_fp80 %1, 0xK4012F424000000000000 tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %2) - %3 = load x86_fp80* %a, align 16 + %3 = load x86_fp80, x86_fp80* %a, align 16 %4 = fmul x86_fp80 %3, 0xK4006B400000000000000 %5 = fmul x86_fp80 %4, 0xK4012F424000000000000 tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %5) @@ -367,7 +367,7 @@ entry: ; Function Attrs: ssp define void @test_live_st(i32 %a1) { entry: - %0 = load x86_fp80* undef, align 16 + %0 = load x86_fp80, x86_fp80* undef, align 16 %cond = icmp eq i32 %a1, 1 br i1 %cond, label %sw.bb4.i, label %_Z5tointRKe.exit |