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authorAndrew Trick <atrick@apple.com>2012-02-01 23:20:51 +0000
committerAndrew Trick <atrick@apple.com>2012-02-01 23:20:51 +0000
commit8523b16ff5648db3421b31c119a9127ef9a573fb (patch)
treec60d267e4e59ef5f918585848fba7b48b26ff8f5 /llvm/test/CodeGen/X86/inline-asm-fpstack.ll
parentc7024a48db742a697ecc88930da8893ad6c1c3da (diff)
downloadbcm5719-llvm-8523b16ff5648db3421b31c119a9127ef9a573fb.tar.gz
bcm5719-llvm-8523b16ff5648db3421b31c119a9127ef9a573fb.zip
Instruction scheduling itinerary for Intel Atom.
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT. Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches. Adds a test to verify that the scheduler is working. Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP. Patch by Preston Gurd! llvm-svn: 149558
Diffstat (limited to 'llvm/test/CodeGen/X86/inline-asm-fpstack.ll')
-rw-r--r--llvm/test/CodeGen/X86/inline-asm-fpstack.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/X86/inline-asm-fpstack.ll b/llvm/test/CodeGen/X86/inline-asm-fpstack.ll
index c9a1c1c38c5..2249618c8a9 100644
--- a/llvm/test/CodeGen/X86/inline-asm-fpstack.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-fpstack.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin | FileCheck %s
; There should be no stack manipulations between the inline asm and ret.
; CHECK: test1
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