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| author | Sanjay Patel <spatel@rotateright.com> | 2016-11-16 17:42:40 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-11-16 17:42:40 +0000 |
| commit | 7f3d51f8403a2a6b7258b5423addb8bc148c11c1 (patch) | |
| tree | 0636003018c0bd120f1643bac9f15d9db4baf1e1 /llvm/test/CodeGen/X86/fp-logic.ll | |
| parent | d47588986e102d022f5cc92fdb2b16b5554830ca (diff) | |
| download | bcm5719-llvm-7f3d51f8403a2a6b7258b5423addb8bc148c11c1.tar.gz bcm5719-llvm-7f3d51f8403a2a6b7258b5423addb8bc148c11c1.zip | |
[x86] add fake scalar FP logic instructions to ReplaceableInstrs to save some bytes
We can replace "scalar" FP-bitwise-logic with other forms of bitwise-logic instructions.
Scalar SSE/AVX FP-logic instructions only exist in your imagination and/or the bowels of
compilers, but logically equivalent int, float, and double variants of bitwise-logic
instructions are reality in x86, and the float variant may be a shorter instruction
depending on which flavor (SSE or AVX) of vector ISA you have...so just prefer float all
the time.
This is a preliminary step towards solving PR6137:
https://llvm.org/bugs/show_bug.cgi?id=6137
Differential Revision:
https://reviews.llvm.org/D26712
llvm-svn: 287122
Diffstat (limited to 'llvm/test/CodeGen/X86/fp-logic.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/fp-logic.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/X86/fp-logic.ll b/llvm/test/CodeGen/X86/fp-logic.ll index 40bab00e1ab..2c6698fb120 100644 --- a/llvm/test/CodeGen/X86/fp-logic.ll +++ b/llvm/test/CodeGen/X86/fp-logic.ll @@ -223,7 +223,7 @@ define float @f7_xor(float %x) { define double @doubles(double %x, double %y) { ; CHECK-LABEL: doubles: ; CHECK: # BB#0: -; CHECK-NEXT: andpd %xmm1, %xmm0 +; CHECK-NEXT: andps %xmm1, %xmm0 ; CHECK-NEXT: retq ; %bc1 = bitcast double %x to i64 |
