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| author | Craig Topper <craig.topper@intel.com> | 2017-12-28 19:46:03 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-12-28 19:46:03 +0000 |
| commit | 4b311da3a4ef37b4140d78a541e4467cefc2f3a4 (patch) | |
| tree | 3e202e182c4da74843f245963b284f9ceee9a1b2 /llvm/test/CodeGen/X86/fp-logic.ll | |
| parent | d5fed997db704912c0dfec3f162b53ba19fc8162 (diff) | |
| download | bcm5719-llvm-4b311da3a4ef37b4140d78a541e4467cefc2f3a4.tar.gz bcm5719-llvm-4b311da3a4ef37b4140d78a541e4467cefc2f3a4.zip | |
[X86] Fix inconsistencies in different places where we split loads/stores.
-Use MinAlign instead of std::min.
-Use SelectionDAG::getMemBasePlusOffset.
-Apply offset to the pointer info for the second load/store created.
llvm-svn: 321536
Diffstat (limited to 'llvm/test/CodeGen/X86/fp-logic.ll')
0 files changed, 0 insertions, 0 deletions
