diff options
| author | Craig Topper <craig.topper@intel.com> | 2019-02-04 04:15:02 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-02-04 04:15:02 +0000 |
| commit | f77b858dc39224c094ab5e8c861839c130234060 (patch) | |
| tree | d2fb448353688c47c495d2608a87e1db58b04600 /llvm/test/CodeGen/X86/fp-cvt.ll | |
| parent | 764727d92e526dbee121303125aac411a1318a3d (diff) | |
| download | bcm5719-llvm-f77b858dc39224c094ab5e8c861839c130234060.tar.gz bcm5719-llvm-f77b858dc39224c094ab5e8c861839c130234060.zip | |
Revert r352985 "[X86] Print %st(0) as %st to match what gcc inline asm uses as the clobber name to make MS inline asm work correctly"
Looking into gcc and objdump behavior more this was overly aggressive. If the register is encoded in the instruction we should print %st(0), if its implicit we should print %st.
I'll be making a more directed change in a future patch.
llvm-svn: 353013
Diffstat (limited to 'llvm/test/CodeGen/X86/fp-cvt.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/fp-cvt.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/X86/fp-cvt.ll b/llvm/test/CodeGen/X86/fp-cvt.ll index dd885447360..ab3d40ddcaa 100644 --- a/llvm/test/CodeGen/X86/fp-cvt.ll +++ b/llvm/test/CodeGen/X86/fp-cvt.ll @@ -460,7 +460,7 @@ define i64 @fptoui_i64_fp80(x86_fp80 %a0) nounwind { ; X86-NEXT: fstp %st(1) ; X86-NEXT: fldz ; X86-NEXT: .LBB10_2: -; X86-NEXT: fstp %st +; X86-NEXT: fstp %st(0) ; X86-NEXT: fnstcw {{[0-9]+}}(%esp) ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F @@ -486,7 +486,7 @@ define i64 @fptoui_i64_fp80(x86_fp80 %a0) nounwind { ; X64-X87-NEXT: xorl %eax, %eax ; X64-X87-NEXT: fxch %st(1) ; X64-X87-NEXT: fucompi %st(2) -; X64-X87-NEXT: fcmovnbe %st(1), %st +; X64-X87-NEXT: fcmovnbe %st(1), %st(0) ; X64-X87-NEXT: fstp %st(1) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx @@ -509,7 +509,7 @@ define i64 @fptoui_i64_fp80(x86_fp80 %a0) nounwind { ; X64-SSSE3-NEXT: xorl %eax, %eax ; X64-SSSE3-NEXT: fxch %st(1) ; X64-SSSE3-NEXT: fucompi %st(2) -; X64-SSSE3-NEXT: fcmovnbe %st(1), %st +; X64-SSSE3-NEXT: fcmovnbe %st(1), %st(0) ; X64-SSSE3-NEXT: fstp %st(1) ; X64-SSSE3-NEXT: fisttpll -{{[0-9]+}}(%rsp) ; X64-SSSE3-NEXT: setbe %al @@ -542,7 +542,7 @@ define i64 @fptoui_i64_fp80_ld(x86_fp80 *%a0) nounwind { ; X86-NEXT: fstp %st(1) ; X86-NEXT: fldz ; X86-NEXT: .LBB11_2: -; X86-NEXT: fstp %st +; X86-NEXT: fstp %st(0) ; X86-NEXT: fnstcw {{[0-9]+}}(%esp) ; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax ; X86-NEXT: movw $3199, {{[0-9]+}}(%esp) # imm = 0xC7F @@ -568,7 +568,7 @@ define i64 @fptoui_i64_fp80_ld(x86_fp80 *%a0) nounwind { ; X64-X87-NEXT: xorl %eax, %eax ; X64-X87-NEXT: fxch %st(1) ; X64-X87-NEXT: fucompi %st(2) -; X64-X87-NEXT: fcmovnbe %st(1), %st +; X64-X87-NEXT: fcmovnbe %st(1), %st(0) ; X64-X87-NEXT: fstp %st(1) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx @@ -591,7 +591,7 @@ define i64 @fptoui_i64_fp80_ld(x86_fp80 *%a0) nounwind { ; X64-SSSE3-NEXT: xorl %eax, %eax ; X64-SSSE3-NEXT: fxch %st(1) ; X64-SSSE3-NEXT: fucompi %st(2) -; X64-SSSE3-NEXT: fcmovnbe %st(1), %st +; X64-SSSE3-NEXT: fcmovnbe %st(1), %st(0) ; X64-SSSE3-NEXT: fstp %st(1) ; X64-SSSE3-NEXT: fisttpll -{{[0-9]+}}(%rsp) ; X64-SSSE3-NEXT: setbe %al |
