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| author | Craig Topper <craig.topper@intel.com> | 2019-02-19 22:37:00 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-02-19 22:37:00 +0000 |
| commit | 8eade092497e17ad1cfbb1a7c3d9156686b229cc (patch) | |
| tree | eec7c65ac36e8cea9fdfec1090f11b48595d25b8 /llvm/test/CodeGen/X86/fp-cvt.ll | |
| parent | b6bc11d4067df37af30cddddc7f1ffd42391b901 (diff) | |
| download | bcm5719-llvm-8eade092497e17ad1cfbb1a7c3d9156686b229cc.tar.gz bcm5719-llvm-8eade092497e17ad1cfbb1a7c3d9156686b229cc.zip | |
[X86] Mark FP32_TO_INT16_IN_MEM/FP32_TO_INT32_IN_MEM/FP32_TO_INT64_IN_MEM as clobbering EFLAGS to prevent mis-scheduling during conversion from SelectionDAG to MIR.
After r354178, these instruction expand to a sequence that uses an OR instruction. That OR clobbers EFLAGS so we need to state that to avoid accidentally using the clobbered flags.
Our tests show the bug, but I didn't notice because the SETcc instructions didn't move after r354178 since it used to be safe to do the fp->int conversion first.
We should probably convert this whole sequence to SelectionDAG instead of a custom inserter to avoid mistakes like this.
Fixes PR40779
llvm-svn: 354395
Diffstat (limited to 'llvm/test/CodeGen/X86/fp-cvt.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/fp-cvt.ll | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/llvm/test/CodeGen/X86/fp-cvt.ll b/llvm/test/CodeGen/X86/fp-cvt.ll index be09718eaac..8164651f996 100644 --- a/llvm/test/CodeGen/X86/fp-cvt.ll +++ b/llvm/test/CodeGen/X86/fp-cvt.ll @@ -457,15 +457,15 @@ define i64 @fptoui_i64_fp80(x86_fp80 %a0) nounwind { ; X86-NEXT: fldz ; X86-NEXT: .LBB10_2: ; X86-NEXT: fstp %st(0) +; X86-NEXT: setbe %al ; X86-NEXT: fnstcw {{[0-9]+}}(%esp) -; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X86-NEXT: xorl %edx, %edx -; X86-NEXT: orl $3072, %eax # imm = 0xC00 -; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: orl $3072, %ecx # imm = 0xC00 +; X86-NEXT: movw %cx, {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: fistpll {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp) -; X86-NEXT: setbe %dl +; X86-NEXT: movzbl %al, %edx ; X86-NEXT: shll $31, %edx ; X86-NEXT: xorl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax @@ -479,19 +479,19 @@ define i64 @fptoui_i64_fp80(x86_fp80 %a0) nounwind { ; X64-X87-NEXT: flds {{.*}}(%rip) ; X64-X87-NEXT: fld %st(1) ; X64-X87-NEXT: fsub %st(1), %st +; X64-X87-NEXT: xorl %eax, %eax ; X64-X87-NEXT: fxch %st(1) ; X64-X87-NEXT: fucompi %st(2), %st ; X64-X87-NEXT: fcmovnbe %st(1), %st ; X64-X87-NEXT: fstp %st(1) +; X64-X87-NEXT: setbe %al ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx -; X64-X87-NEXT: xorl %eax, %eax ; X64-X87-NEXT: orl $3072, %ecx # imm = 0xC00 ; X64-X87-NEXT: movw %cx, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) -; X64-X87-NEXT: setbe %al ; X64-X87-NEXT: shlq $63, %rax ; X64-X87-NEXT: xorq -{{[0-9]+}}(%rsp), %rax ; X64-X87-NEXT: retq @@ -539,15 +539,15 @@ define i64 @fptoui_i64_fp80_ld(x86_fp80 *%a0) nounwind { ; X86-NEXT: fldz ; X86-NEXT: .LBB11_2: ; X86-NEXT: fstp %st(0) +; X86-NEXT: setbe %al ; X86-NEXT: fnstcw {{[0-9]+}}(%esp) -; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax -; X86-NEXT: xorl %edx, %edx -; X86-NEXT: orl $3072, %eax # imm = 0xC00 -; X86-NEXT: movw %ax, {{[0-9]+}}(%esp) +; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: orl $3072, %ecx # imm = 0xC00 +; X86-NEXT: movw %cx, {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp) ; X86-NEXT: fistpll {{[0-9]+}}(%esp) ; X86-NEXT: fldcw {{[0-9]+}}(%esp) -; X86-NEXT: setbe %dl +; X86-NEXT: movzbl %al, %edx ; X86-NEXT: shll $31, %edx ; X86-NEXT: xorl {{[0-9]+}}(%esp), %edx ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax @@ -561,19 +561,19 @@ define i64 @fptoui_i64_fp80_ld(x86_fp80 *%a0) nounwind { ; X64-X87-NEXT: flds {{.*}}(%rip) ; X64-X87-NEXT: fld %st(1) ; X64-X87-NEXT: fsub %st(1), %st +; X64-X87-NEXT: xorl %eax, %eax ; X64-X87-NEXT: fxch %st(1) ; X64-X87-NEXT: fucompi %st(2), %st ; X64-X87-NEXT: fcmovnbe %st(1), %st ; X64-X87-NEXT: fstp %st(1) +; X64-X87-NEXT: setbe %al ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: movzwl -{{[0-9]+}}(%rsp), %ecx -; X64-X87-NEXT: xorl %eax, %eax ; X64-X87-NEXT: orl $3072, %ecx # imm = 0xC00 ; X64-X87-NEXT: movw %cx, -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fistpll -{{[0-9]+}}(%rsp) ; X64-X87-NEXT: fldcw -{{[0-9]+}}(%rsp) -; X64-X87-NEXT: setbe %al ; X64-X87-NEXT: shlq $63, %rax ; X64-X87-NEXT: xorq -{{[0-9]+}}(%rsp), %rax ; X64-X87-NEXT: retq |
