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author | Craig Topper <craig.topper@intel.com> | 2019-02-05 21:47:42 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2019-02-05 21:47:42 +0000 |
commit | 4562f420cd4bb62a5d15f51e18e1bc60a217c62b (patch) | |
tree | 22c2baba83c26aee8607d4d98af324d0831e38fe /llvm/test/CodeGen/X86/fp-cvt.ll | |
parent | 0a142346b3e2bebb98b40ff5fc991b0fc83aeea9 (diff) | |
download | bcm5719-llvm-4562f420cd4bb62a5d15f51e18e1bc60a217c62b.tar.gz bcm5719-llvm-4562f420cd4bb62a5d15f51e18e1bc60a217c62b.zip |
[X86] Regenerate tests missed in r353061. NFC
We now print the implicit %st register on these instruction, but since they occur at the end of the line, FileCheck didn't see they were missing.
llvm-svn: 353222
Diffstat (limited to 'llvm/test/CodeGen/X86/fp-cvt.ll')
-rw-r--r-- | llvm/test/CodeGen/X86/fp-cvt.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/X86/fp-cvt.ll b/llvm/test/CodeGen/X86/fp-cvt.ll index 71738cb85d2..92bff0333be 100644 --- a/llvm/test/CodeGen/X86/fp-cvt.ll +++ b/llvm/test/CodeGen/X86/fp-cvt.ll @@ -449,7 +449,7 @@ define i64 @fptoui_i64_fp80(x86_fp80 %a0) nounwind { ; X86-NEXT: fldt 8(%ebp) ; X86-NEXT: flds {{\.LCPI.*}} ; X86-NEXT: fld %st(1) -; X86-NEXT: fsub %st(1) +; X86-NEXT: fsub %st(1), %st ; X86-NEXT: fxch %st(1) ; X86-NEXT: fucomp %st(2) ; X86-NEXT: fnstsw %ax @@ -482,10 +482,10 @@ define i64 @fptoui_i64_fp80(x86_fp80 %a0) nounwind { ; X64-X87-NEXT: fldt {{[0-9]+}}(%rsp) ; X64-X87-NEXT: flds {{.*}}(%rip) ; X64-X87-NEXT: fld %st(1) -; X64-X87-NEXT: fsub %st(1) +; X64-X87-NEXT: fsub %st(1), %st ; X64-X87-NEXT: xorl %eax, %eax ; X64-X87-NEXT: fxch %st(1) -; X64-X87-NEXT: fucompi %st(2) +; X64-X87-NEXT: fucompi %st(2), %st ; X64-X87-NEXT: fcmovnbe %st(1), %st ; X64-X87-NEXT: fstp %st(1) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) @@ -505,10 +505,10 @@ define i64 @fptoui_i64_fp80(x86_fp80 %a0) nounwind { ; X64-SSSE3-NEXT: fldt {{[0-9]+}}(%rsp) ; X64-SSSE3-NEXT: flds {{.*}}(%rip) ; X64-SSSE3-NEXT: fld %st(1) -; X64-SSSE3-NEXT: fsub %st(1) +; X64-SSSE3-NEXT: fsub %st(1), %st ; X64-SSSE3-NEXT: xorl %eax, %eax ; X64-SSSE3-NEXT: fxch %st(1) -; X64-SSSE3-NEXT: fucompi %st(2) +; X64-SSSE3-NEXT: fucompi %st(2), %st ; X64-SSSE3-NEXT: fcmovnbe %st(1), %st ; X64-SSSE3-NEXT: fstp %st(1) ; X64-SSSE3-NEXT: fisttpll -{{[0-9]+}}(%rsp) @@ -531,7 +531,7 @@ define i64 @fptoui_i64_fp80_ld(x86_fp80 *%a0) nounwind { ; X86-NEXT: fldt (%eax) ; X86-NEXT: flds {{\.LCPI.*}} ; X86-NEXT: fld %st(1) -; X86-NEXT: fsub %st(1) +; X86-NEXT: fsub %st(1), %st ; X86-NEXT: fxch %st(1) ; X86-NEXT: fucomp %st(2) ; X86-NEXT: fnstsw %ax @@ -564,10 +564,10 @@ define i64 @fptoui_i64_fp80_ld(x86_fp80 *%a0) nounwind { ; X64-X87-NEXT: fldt (%rdi) ; X64-X87-NEXT: flds {{.*}}(%rip) ; X64-X87-NEXT: fld %st(1) -; X64-X87-NEXT: fsub %st(1) +; X64-X87-NEXT: fsub %st(1), %st ; X64-X87-NEXT: xorl %eax, %eax ; X64-X87-NEXT: fxch %st(1) -; X64-X87-NEXT: fucompi %st(2) +; X64-X87-NEXT: fucompi %st(2), %st ; X64-X87-NEXT: fcmovnbe %st(1), %st ; X64-X87-NEXT: fstp %st(1) ; X64-X87-NEXT: fnstcw -{{[0-9]+}}(%rsp) @@ -587,10 +587,10 @@ define i64 @fptoui_i64_fp80_ld(x86_fp80 *%a0) nounwind { ; X64-SSSE3-NEXT: fldt (%rdi) ; X64-SSSE3-NEXT: flds {{.*}}(%rip) ; X64-SSSE3-NEXT: fld %st(1) -; X64-SSSE3-NEXT: fsub %st(1) +; X64-SSSE3-NEXT: fsub %st(1), %st ; X64-SSSE3-NEXT: xorl %eax, %eax ; X64-SSSE3-NEXT: fxch %st(1) -; X64-SSSE3-NEXT: fucompi %st(2) +; X64-SSSE3-NEXT: fucompi %st(2), %st ; X64-SSSE3-NEXT: fcmovnbe %st(1), %st ; X64-SSSE3-NEXT: fstp %st(1) ; X64-SSSE3-NEXT: fisttpll -{{[0-9]+}}(%rsp) |