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authorCraig Topper <craig.topper@intel.com>2018-07-13 22:09:30 +0000
committerCraig Topper <craig.topper@intel.com>2018-07-13 22:09:30 +0000
commitda424ba1c5ead401270aa64891cbf9a2791b08c4 (patch)
tree5bf6ff2b4de3750ceec3d59c4b9307a9d83e4033 /llvm/test/CodeGen/X86/fast-isel-uint-float-conversion-x86-64.ll
parentee51d5c64e59fe4fd88b58ee5842bb05fc403053 (diff)
downloadbcm5719-llvm-da424ba1c5ead401270aa64891cbf9a2791b08c4.tar.gz
bcm5719-llvm-da424ba1c5ead401270aa64891cbf9a2791b08c4.zip
[X86][FastISel] Support uitofp with avx512.
llvm-svn: 337055
Diffstat (limited to 'llvm/test/CodeGen/X86/fast-isel-uint-float-conversion-x86-64.ll')
-rw-r--r--llvm/test/CodeGen/X86/fast-isel-uint-float-conversion-x86-64.ll69
1 files changed, 69 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/fast-isel-uint-float-conversion-x86-64.ll b/llvm/test/CodeGen/X86/fast-isel-uint-float-conversion-x86-64.ll
new file mode 100644
index 00000000000..60d2903ad09
--- /dev/null
+++ b/llvm/test/CodeGen/X86/fast-isel-uint-float-conversion-x86-64.ll
@@ -0,0 +1,69 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=ALL --check-prefix=AVX
+
+
+define double @long_to_double_rr(i64 %a) {
+; ALL-LABEL: long_to_double_rr:
+; ALL: # %bb.0: # %entry
+; ALL-NEXT: vcvtusi2sdq %rdi, %xmm0, %xmm0
+; ALL-NEXT: retq
+entry:
+ %0 = uitofp i64 %a to double
+ ret double %0
+}
+
+define double @long_to_double_rm(i64* %a) {
+; ALL-LABEL: long_to_double_rm:
+; ALL: # %bb.0: # %entry
+; ALL-NEXT: movq (%rdi), %rax
+; ALL-NEXT: vcvtusi2sdq %rax, %xmm0, %xmm0
+; ALL-NEXT: retq
+entry:
+ %0 = load i64, i64* %a
+ %1 = uitofp i64 %0 to double
+ ret double %1
+}
+
+define double @long_to_double_rm_optsize(i64* %a) optsize {
+; ALL-LABEL: long_to_double_rm_optsize:
+; ALL: # %bb.0: # %entry
+; ALL-NEXT: vcvtusi2sdq (%rdi), %xmm0, %xmm0
+; ALL-NEXT: retq
+entry:
+ %0 = load i64, i64* %a
+ %1 = uitofp i64 %0 to double
+ ret double %1
+}
+
+define float @long_to_float_rr(i64 %a) {
+; ALL-LABEL: long_to_float_rr:
+; ALL: # %bb.0: # %entry
+; ALL-NEXT: vcvtusi2ssq %rdi, %xmm0, %xmm0
+; ALL-NEXT: retq
+entry:
+ %0 = uitofp i64 %a to float
+ ret float %0
+}
+
+define float @long_to_float_rm(i64* %a) {
+; ALL-LABEL: long_to_float_rm:
+; ALL: # %bb.0: # %entry
+; ALL-NEXT: movq (%rdi), %rax
+; ALL-NEXT: vcvtusi2ssq %rax, %xmm0, %xmm0
+; ALL-NEXT: retq
+entry:
+ %0 = load i64, i64* %a
+ %1 = uitofp i64 %0 to float
+ ret float %1
+}
+
+define float @long_to_float_rm_optsize(i64* %a) optsize {
+; ALL-LABEL: long_to_float_rm_optsize:
+; ALL: # %bb.0: # %entry
+; ALL-NEXT: vcvtusi2ssq (%rdi), %xmm0, %xmm0
+; ALL-NEXT: retq
+entry:
+ %0 = load i64, i64* %a
+ %1 = uitofp i64 %0 to float
+ ret float %1
+}
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