[X86] Add avx command lines to two fast-isel tests to get coverage of selecting vucomiss/vucomisd.

The selection of these shows up as a code coverage hole when looking at the llvm-cov link on llvm.org

llvm-svn: 316823

1 files changed, 179 insertions, 74 deletions

diff --git a/llvm/test/CodeGen/X86/fast-isel-select-cmov2.ll b/llvm/test/CodeGen/X86/fast-isel-select-cmov2.ll
index 309030a6cf1..4e9eda0a44d 100644
--- a/llvm/test/CodeGen/X86/fast-isel-select-cmov2.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-select-cmov2.ll
@@ -1,6 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10                               | FileCheck %s --check-prefix=CHECK --check-prefix=SDAG
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK --check-prefix=FAST
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10                               | FileCheck %s --check-prefix=CHECK --check-prefix=NOAVX --check-prefix=SDAG
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK --check-prefix=NOAVX --check-prefix=FAST
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mattr=avx | FileCheck %s --check-prefix=CHECK --check-prefix=FAST_AVX
 
 ; Test all the cmp predicates that can feed an integer conditional move.
 
@@ -32,150 +33,244 @@ define i64 @select_fcmp_oeq_cmov(double %a, double %b, i64 %c, i64 %d) {
 ; FAST-NEXT:    cmoveq %rsi, %rdi
 ; FAST-NEXT:    movq %rdi, %rax
 ; FAST-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_oeq_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm1, %xmm0
+; FAST_AVX-NEXT:    setnp %al
+; FAST_AVX-NEXT:    sete %cl
+; FAST_AVX-NEXT:    testb %al, %cl
+; FAST_AVX-NEXT:    cmoveq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp oeq double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2
 }
 
 define i64 @select_fcmp_ogt_cmov(double %a, double %b, i64 %c, i64 %d) {
-; CHECK-LABEL: select_fcmp_ogt_cmov:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    ucomisd %xmm1, %xmm0
-; CHECK-NEXT:    cmovbeq %rsi, %rdi
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    retq
+; NOAVX-LABEL: select_fcmp_ogt_cmov:
+; NOAVX:       ## BB#0:
+; NOAVX-NEXT:    ucomisd %xmm1, %xmm0
+; NOAVX-NEXT:    cmovbeq %rsi, %rdi
+; NOAVX-NEXT:    movq %rdi, %rax
+; NOAVX-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_ogt_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm1, %xmm0
+; FAST_AVX-NEXT:    cmovbeq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp ogt double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2
 }
 
 define i64 @select_fcmp_oge_cmov(double %a, double %b, i64 %c, i64 %d) {
-; CHECK-LABEL: select_fcmp_oge_cmov:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    ucomisd %xmm1, %xmm0
-; CHECK-NEXT:    cmovbq %rsi, %rdi
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    retq
+; NOAVX-LABEL: select_fcmp_oge_cmov:
+; NOAVX:       ## BB#0:
+; NOAVX-NEXT:    ucomisd %xmm1, %xmm0
+; NOAVX-NEXT:    cmovbq %rsi, %rdi
+; NOAVX-NEXT:    movq %rdi, %rax
+; NOAVX-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_oge_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm1, %xmm0
+; FAST_AVX-NEXT:    cmovbq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp oge double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2
 }
 
 define i64 @select_fcmp_olt_cmov(double %a, double %b, i64 %c, i64 %d) {
-; CHECK-LABEL: select_fcmp_olt_cmov:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    ucomisd %xmm0, %xmm1
-; CHECK-NEXT:    cmovbeq %rsi, %rdi
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    retq
+; NOAVX-LABEL: select_fcmp_olt_cmov:
+; NOAVX:       ## BB#0:
+; NOAVX-NEXT:    ucomisd %xmm0, %xmm1
+; NOAVX-NEXT:    cmovbeq %rsi, %rdi
+; NOAVX-NEXT:    movq %rdi, %rax
+; NOAVX-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_olt_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm0, %xmm1
+; FAST_AVX-NEXT:    cmovbeq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp olt double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2
 }
 
 define i64 @select_fcmp_ole_cmov(double %a, double %b, i64 %c, i64 %d) {
-; CHECK-LABEL: select_fcmp_ole_cmov:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    ucomisd %xmm0, %xmm1
-; CHECK-NEXT:    cmovbq %rsi, %rdi
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    retq
+; NOAVX-LABEL: select_fcmp_ole_cmov:
+; NOAVX:       ## BB#0:
+; NOAVX-NEXT:    ucomisd %xmm0, %xmm1
+; NOAVX-NEXT:    cmovbq %rsi, %rdi
+; NOAVX-NEXT:    movq %rdi, %rax
+; NOAVX-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_ole_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm0, %xmm1
+; FAST_AVX-NEXT:    cmovbq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp ole double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2
 }
 
 define i64 @select_fcmp_one_cmov(double %a, double %b, i64 %c, i64 %d) {
-; CHECK-LABEL: select_fcmp_one_cmov:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    ucomisd %xmm1, %xmm0
-; CHECK-NEXT:    cmoveq %rsi, %rdi
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    retq
+; NOAVX-LABEL: select_fcmp_one_cmov:
+; NOAVX:       ## BB#0:
+; NOAVX-NEXT:    ucomisd %xmm1, %xmm0
+; NOAVX-NEXT:    cmoveq %rsi, %rdi
+; NOAVX-NEXT:    movq %rdi, %rax
+; NOAVX-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_one_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm1, %xmm0
+; FAST_AVX-NEXT:    cmoveq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp one double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2
 }
 
 define i64 @select_fcmp_ord_cmov(double %a, double %b, i64 %c, i64 %d) {
-; CHECK-LABEL: select_fcmp_ord_cmov:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    ucomisd %xmm1, %xmm0
-; CHECK-NEXT:    cmovpq %rsi, %rdi
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    retq
+; NOAVX-LABEL: select_fcmp_ord_cmov:
+; NOAVX:       ## BB#0:
+; NOAVX-NEXT:    ucomisd %xmm1, %xmm0
+; NOAVX-NEXT:    cmovpq %rsi, %rdi
+; NOAVX-NEXT:    movq %rdi, %rax
+; NOAVX-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_ord_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm1, %xmm0
+; FAST_AVX-NEXT:    cmovpq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp ord double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2
 }
 
 define i64 @select_fcmp_uno_cmov(double %a, double %b, i64 %c, i64 %d) {
-; CHECK-LABEL: select_fcmp_uno_cmov:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    ucomisd %xmm1, %xmm0
-; CHECK-NEXT:    cmovnpq %rsi, %rdi
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    retq
+; NOAVX-LABEL: select_fcmp_uno_cmov:
+; NOAVX:       ## BB#0:
+; NOAVX-NEXT:    ucomisd %xmm1, %xmm0
+; NOAVX-NEXT:    cmovnpq %rsi, %rdi
+; NOAVX-NEXT:    movq %rdi, %rax
+; NOAVX-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_uno_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm1, %xmm0
+; FAST_AVX-NEXT:    cmovnpq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp uno double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2
 }
 
 define i64 @select_fcmp_ueq_cmov(double %a, double %b, i64 %c, i64 %d) {
-; CHECK-LABEL: select_fcmp_ueq_cmov:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    ucomisd %xmm1, %xmm0
-; CHECK-NEXT:    cmovneq %rsi, %rdi
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    retq
+; NOAVX-LABEL: select_fcmp_ueq_cmov:
+; NOAVX:       ## BB#0:
+; NOAVX-NEXT:    ucomisd %xmm1, %xmm0
+; NOAVX-NEXT:    cmovneq %rsi, %rdi
+; NOAVX-NEXT:    movq %rdi, %rax
+; NOAVX-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_ueq_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm1, %xmm0
+; FAST_AVX-NEXT:    cmovneq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp ueq double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2
 }
 
 define i64 @select_fcmp_ugt_cmov(double %a, double %b, i64 %c, i64 %d) {
-; CHECK-LABEL: select_fcmp_ugt_cmov:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    ucomisd %xmm0, %xmm1
-; CHECK-NEXT:    cmovaeq %rsi, %rdi
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    retq
+; NOAVX-LABEL: select_fcmp_ugt_cmov:
+; NOAVX:       ## BB#0:
+; NOAVX-NEXT:    ucomisd %xmm0, %xmm1
+; NOAVX-NEXT:    cmovaeq %rsi, %rdi
+; NOAVX-NEXT:    movq %rdi, %rax
+; NOAVX-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_ugt_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm0, %xmm1
+; FAST_AVX-NEXT:    cmovaeq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp ugt double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2
 }
 
 define i64 @select_fcmp_uge_cmov(double %a, double %b, i64 %c, i64 %d) {
-; CHECK-LABEL: select_fcmp_uge_cmov:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    ucomisd %xmm0, %xmm1
-; CHECK-NEXT:    cmovaq %rsi, %rdi
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    retq
+; NOAVX-LABEL: select_fcmp_uge_cmov:
+; NOAVX:       ## BB#0:
+; NOAVX-NEXT:    ucomisd %xmm0, %xmm1
+; NOAVX-NEXT:    cmovaq %rsi, %rdi
+; NOAVX-NEXT:    movq %rdi, %rax
+; NOAVX-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_uge_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm0, %xmm1
+; FAST_AVX-NEXT:    cmovaq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp uge double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2
 }
 
 define i64 @select_fcmp_ult_cmov(double %a, double %b, i64 %c, i64 %d) {
-; CHECK-LABEL: select_fcmp_ult_cmov:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    ucomisd %xmm1, %xmm0
-; CHECK-NEXT:    cmovaeq %rsi, %rdi
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    retq
+; NOAVX-LABEL: select_fcmp_ult_cmov:
+; NOAVX:       ## BB#0:
+; NOAVX-NEXT:    ucomisd %xmm1, %xmm0
+; NOAVX-NEXT:    cmovaeq %rsi, %rdi
+; NOAVX-NEXT:    movq %rdi, %rax
+; NOAVX-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_ult_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm1, %xmm0
+; FAST_AVX-NEXT:    cmovaeq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp ult double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2
 }
 
 define i64 @select_fcmp_ule_cmov(double %a, double %b, i64 %c, i64 %d) {
-; CHECK-LABEL: select_fcmp_ule_cmov:
-; CHECK:       ## BB#0:
-; CHECK-NEXT:    ucomisd %xmm1, %xmm0
-; CHECK-NEXT:    cmovaq %rsi, %rdi
-; CHECK-NEXT:    movq %rdi, %rax
-; CHECK-NEXT:    retq
+; NOAVX-LABEL: select_fcmp_ule_cmov:
+; NOAVX:       ## BB#0:
+; NOAVX-NEXT:    ucomisd %xmm1, %xmm0
+; NOAVX-NEXT:    cmovaq %rsi, %rdi
+; NOAVX-NEXT:    movq %rdi, %rax
+; NOAVX-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_ule_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm1, %xmm0
+; FAST_AVX-NEXT:    cmovaq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp ule double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2
@@ -199,6 +294,16 @@ define i64 @select_fcmp_une_cmov(double %a, double %b, i64 %c, i64 %d) {
 ; FAST-NEXT:    cmoveq %rsi, %rdi
 ; FAST-NEXT:    movq %rdi, %rax
 ; FAST-NEXT:    retq
+;
+; FAST_AVX-LABEL: select_fcmp_une_cmov:
+; FAST_AVX:       ## BB#0:
+; FAST_AVX-NEXT:    vucomisd %xmm1, %xmm0
+; FAST_AVX-NEXT:    setp %al
+; FAST_AVX-NEXT:    setne %cl
+; FAST_AVX-NEXT:    orb %al, %cl
+; FAST_AVX-NEXT:    cmoveq %rsi, %rdi
+; FAST_AVX-NEXT:    movq %rdi, %rax
+; FAST_AVX-NEXT:    retq
   %1 = fcmp une double %a, %b
   %2 = select i1 %1, i64 %c, i64 %d
   ret i64 %2