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| author | Craig Topper <craig.topper@intel.com> | 2019-02-16 03:34:54 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-02-16 03:34:54 +0000 |
| commit | 61da80584d7d6c99c5c3b745685a1fb44dcff164 (patch) | |
| tree | 6de93924b12893a12738d08e0f44cfbb611a1bb8 /llvm/test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll | |
| parent | f6e77311502c091f5fad236be5b830801ec13332 (diff) | |
| download | bcm5719-llvm-61da80584d7d6c99c5c3b745685a1fb44dcff164.tar.gz bcm5719-llvm-61da80584d7d6c99c5c3b745685a1fb44dcff164.zip | |
[X86] Don't prevent load folding for cvtsi2ss/cvtsi2sd based on hasPartialRegUpdate.
Preventing the load fold won't fix the partial register update since the
input we can fold is a GPR. So it will do nothing to prevent a false dependency
on an XMM register.
llvm-svn: 354193
Diffstat (limited to 'llvm/test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll b/llvm/test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll index 469b5e5b4ba..5ba47bda19d 100644 --- a/llvm/test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll +++ b/llvm/test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll @@ -22,14 +22,12 @@ entry: define double @long_to_double_rm(i64* %a) { ; SSE2-LABEL: long_to_double_rm: ; SSE2: # %bb.0: # %entry -; SSE2-NEXT: movq (%rdi), %rax -; SSE2-NEXT: cvtsi2sdq %rax, %xmm0 +; SSE2-NEXT: cvtsi2sdq (%rdi), %xmm0 ; SSE2-NEXT: retq ; ; AVX-LABEL: long_to_double_rm: ; AVX: # %bb.0: # %entry -; AVX-NEXT: movq (%rdi), %rax -; AVX-NEXT: vcvtsi2sdq %rax, %xmm0, %xmm0 +; AVX-NEXT: vcvtsi2sdq (%rdi), %xmm0, %xmm0 ; AVX-NEXT: retq entry: %0 = load i64, i64* %a @@ -71,14 +69,12 @@ entry: define float @long_to_float_rm(i64* %a) { ; SSE2-LABEL: long_to_float_rm: ; SSE2: # %bb.0: # %entry -; SSE2-NEXT: movq (%rdi), %rax -; SSE2-NEXT: cvtsi2ssq %rax, %xmm0 +; SSE2-NEXT: cvtsi2ssq (%rdi), %xmm0 ; SSE2-NEXT: retq ; ; AVX-LABEL: long_to_float_rm: ; AVX: # %bb.0: # %entry -; AVX-NEXT: movq (%rdi), %rax -; AVX-NEXT: vcvtsi2ssq %rax, %xmm0, %xmm0 +; AVX-NEXT: vcvtsi2ssq (%rdi), %xmm0, %xmm0 ; AVX-NEXT: retq entry: %0 = load i64, i64* %a |
