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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-10-01 14:26:11 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-10-01 14:26:11 +0000 |
| commit | ccdd1ff49b2cebd46eb3b3972680cc07abff8a5e (patch) | |
| tree | b0e80cb74d6896c857bf9e910957c0ddaa2080d4 /llvm/test/CodeGen/X86/f16c-intrinsics-fast-isel.ll | |
| parent | 45535cb1861266ad40e536dbdefd8984e186bc5f (diff) | |
| download | bcm5719-llvm-ccdd1ff49b2cebd46eb3b3972680cc07abff8a5e.tar.gz bcm5719-llvm-ccdd1ff49b2cebd46eb3b3972680cc07abff8a5e.zip | |
[X86][SSE] Enable commutation from MOVSD/MOVSS to BLENDPD/BLENDPS on SSE41+ targets
Instead of selecting between MOVSD/MOVSS and BLENDPD/BLENDPS at shuffle lowering by subtarget this will help us select the instruction based on actual commutation requirements.
We could possibly add BLENDPD/BLENDPS -> MOVSD/MOVSS commutation and MOVSD/MOVSS memory folding using a similar approach if it proves useful
I avoided adding AVX512 handling as I'm not sure when we should be making use of VBLENDPD/VBLENDPS on EVEX targets
llvm-svn: 283037
Diffstat (limited to 'llvm/test/CodeGen/X86/f16c-intrinsics-fast-isel.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/f16c-intrinsics-fast-isel.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/X86/f16c-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/f16c-intrinsics-fast-isel.ll index aabb79ed05a..f66c53e8ee6 100644 --- a/llvm/test/CodeGen/X86/f16c-intrinsics-fast-isel.ll +++ b/llvm/test/CodeGen/X86/f16c-intrinsics-fast-isel.ll @@ -40,7 +40,7 @@ define i16 @test_cvtss_sh(float %a0) nounwind { ; X32: # BB#0: ; X32-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; X32-NEXT: vxorps %xmm1, %xmm1, %xmm1 -; X32-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3] +; X32-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3] ; X32-NEXT: vcvtps2ph $0, %xmm0, %xmm0 ; X32-NEXT: vmovd %xmm0, %eax ; X32-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> @@ -49,7 +49,7 @@ define i16 @test_cvtss_sh(float %a0) nounwind { ; X64-LABEL: test_cvtss_sh: ; X64: # BB#0: ; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1 -; X64-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3] +; X64-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3] ; X64-NEXT: vcvtps2ph $0, %xmm0, %xmm0 ; X64-NEXT: vmovd %xmm0, %eax ; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> |
